URL https://opencores.org/ocsvn/neorv32/neorv32/trunk

Subversion Repositories neorv32

[/] [neorv32/] [trunk/] [rtl/] [core/] [neorv32_cpu_bus.vhd] - Diff between revs 30 and 31

Rev 30	Rev 31
Line 338...	Line 338...
`-- output instruction fetch error to controller --`	`-- output instruction fetch error to controller --`
`ma_instr_o <= i_arbiter.err_align;`	`ma_instr_o <= i_arbiter.err_align;`
`be_instr_o <= i_arbiter.err_bus;`	`be_instr_o <= i_arbiter.err_bus;`

`-- instruction bus (read-only) --`	`-- instruction bus (read-only) --`
`i_bus_addr_o <= fetch_pc_i;`	`i_bus_addr_o <= fetch_pc_i(data_width_c-1 downto 2) & "00"; -- instruction access is always 4-byte aligned (even for compressed instructions)`
`i_bus_wdata_o <= (others => '0');`	`i_bus_wdata_o <= (others => '0');`
`i_bus_ben_o <= (others => '0');`	`i_bus_ben_o <= (others => '0');`
`i_bus_we_o <= '0';`	`i_bus_we_o <= '0';`
`i_bus_re_o <= ctrl_i(ctrl_bus_if_c) and (not i_misaligned) and (not if_pmp_fault); -- no actual read when misaligned or PMP fault`	`i_bus_re_o <= ctrl_i(ctrl_bus_if_c) and (not i_misaligned) and (not if_pmp_fault); -- no actual read when misaligned or PMP fault`
`i_bus_fence_o <= ctrl_i(ctrl_bus_fencei_c);`	`i_bus_fence_o <= ctrl_i(ctrl_bus_fencei_c);`