| Line 115... |
Line 115... |
reset : std_ulogic;
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reset : std_ulogic;
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bus_err_ack : std_ulogic;
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bus_err_ack : std_ulogic;
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end record;
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end record;
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signal fetch_engine : fetch_engine_t;
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signal fetch_engine : fetch_engine_t;
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-- instrucion prefetch buffer (IPB) --
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-- instrucion prefetch buffer (IPB, real FIFO) --
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type ipb_data_fifo_t is array (0 to ipb_entries_c-1) of std_ulogic_vector(2+31 downto 0);
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type ipb_data_fifo_t is array (0 to ipb_entries_c-1) of std_ulogic_vector(2+31 downto 0);
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type ipb_t is record
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type ipb_t is record
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wdata : std_ulogic_vector(2+31 downto 0); -- write status (bus_error, align_error) + 32-bit instruction data
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wdata : std_ulogic_vector(2+31 downto 0); -- write status (bus_error, align_error) + 32-bit instruction data
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we : std_ulogic; -- trigger write
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we : std_ulogic; -- trigger write
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free : std_ulogic; -- free entry available?
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free : std_ulogic; -- free entry available?
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| Line 153... |
Line 153... |
buf : std_ulogic_vector(2+15 downto 0);
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buf : std_ulogic_vector(2+15 downto 0);
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buf_nxt : std_ulogic_vector(2+15 downto 0);
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buf_nxt : std_ulogic_vector(2+15 downto 0);
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end record;
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end record;
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signal issue_engine : issue_engine_t;
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signal issue_engine : issue_engine_t;
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|
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-- instruction buffer --
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-- instruction buffer ("FIFO" with just one entry) --
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type i_buf_t is record
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type i_buf_t is record
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wdata : std_ulogic_vector(35 downto 0); -- 4-bit status + 32-bit instruction
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wdata : std_ulogic_vector(35 downto 0); -- 4-bit status + 32-bit instruction
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rdata : std_ulogic_vector(35 downto 0); -- 4-bit status + 32-bit instruction
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rdata : std_ulogic_vector(35 downto 0); -- 4-bit status + 32-bit instruction
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status : std_ulogic;
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status : std_ulogic;
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clear : std_ulogic;
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clear : std_ulogic;
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| Line 1835... |
Line 1835... |
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-- machine information registers --
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-- machine information registers --
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when csr_mvendorid_c => -- R/-: mvendorid - vendor ID
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when csr_mvendorid_c => -- R/-: mvendorid - vendor ID
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csr.rdata <= (others => '0');
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csr.rdata <= (others => '0');
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when csr_marchid_c => -- R/-: marchid - architecture ID
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when csr_marchid_c => -- R/-: marchid - architecture ID
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csr.rdata <= (others => '0');
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csr.rdata(4 downto 0) <= "10011"; -- official open-source arch ID
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when csr_mimpid_c => -- R/-: mimpid - implementation ID / NEORV32 hardware version
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when csr_mimpid_c => -- R/-: mimpid - implementation ID
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csr.rdata <= hw_version_c;
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csr.rdata <= hw_version_c; -- NEORV32 hardware version
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when csr_mhartid_c => -- R/-: mhartid - hardware thread ID
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when csr_mhartid_c => -- R/-: mhartid - hardware thread ID
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csr.rdata <= HW_THREAD_ID;
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csr.rdata <= HW_THREAD_ID;
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|
|
-- custom machine read-only CSRs --
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-- custom machine read-only CSRs --
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when csr_mzext_c => -- R/-: mzext
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when csr_mzext_c => -- R/-: mzext
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csr.rdata(0) <= bool_to_ulogic_f(CPU_EXTENSION_RISCV_Zicsr); -- Zicsr CPU extension
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csr.rdata(0) <= bool_to_ulogic_f(CPU_EXTENSION_RISCV_Zicsr); -- RISC-V.Zicsr CPU extension
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csr.rdata(1) <= bool_to_ulogic_f(CPU_EXTENSION_RISCV_Zifencei); -- Zifencei CPU extension
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csr.rdata(1) <= bool_to_ulogic_f(CPU_EXTENSION_RISCV_Zifencei); -- RISC-V.Zifencei CPU extension
|
|
|
-- undefined/unavailable --
|
-- undefined/unavailable --
|
when others =>
|
when others =>
|
csr.rdata <= (others => '0'); -- not implemented
|
csr.rdata <= (others => '0'); -- not implemented
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