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[/] [neorv32/] [trunk/] [rtl/] [core/] [neorv32_fifo.vhd] - Diff between revs 62 and 65

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Rev 62 Rev 65
Line 50... Line 50...
    -- control --
    -- control --
    clk_i   : in  std_ulogic; -- clock, rising edge
    clk_i   : in  std_ulogic; -- clock, rising edge
    rstn_i  : in  std_ulogic; -- async reset, low-active
    rstn_i  : in  std_ulogic; -- async reset, low-active
    clear_i : in  std_ulogic; -- sync reset, high-active
    clear_i : in  std_ulogic; -- sync reset, high-active
    level_o : out std_ulogic_vector(index_size_f(FIFO_DEPTH) downto 0); -- fill level
    level_o : out std_ulogic_vector(index_size_f(FIFO_DEPTH) downto 0); -- fill level
 
    half_o  : out std_ulogic; -- FIFO is at least half full
    -- write port --
    -- write port --
    wdata_i : in  std_ulogic_vector(FIFO_WIDTH-1 downto 0); -- write data
    wdata_i : in  std_ulogic_vector(FIFO_WIDTH-1 downto 0); -- write data
    we_i    : in  std_ulogic; -- write enable
    we_i    : in  std_ulogic; -- write enable
    free_o  : out std_ulogic; -- at least one entry is free when set
    free_o  : out std_ulogic; -- at least one entry is free when set
    -- read port --
    -- read port --
Line 81... Line 82...
    free  : std_ulogic;
    free  : std_ulogic;
    avail : std_ulogic;
    avail : std_ulogic;
  end record;
  end record;
  signal fifo : fifo_t;
  signal fifo : fifo_t;
 
 
 
  signal level_diff : std_ulogic_vector(index_size_f(FIFO_DEPTH) downto 0);
 
 
begin
begin
 
 
  -- Sanity Checks --------------------------------------------------------------------------
  -- Sanity Checks --------------------------------------------------------------------------
  -- -------------------------------------------------------------------------------------------
  -- -------------------------------------------------------------------------------------------
  assert not (FIFO_DEPTH = 0) report "NEORV32 CONFIG ERROR: FIFO depth has to be > 0." severity error;
  assert not (FIFO_DEPTH = 0) report "NEORV32 CONFIG ERROR: FIFO depth has to be > 0." severity error;
  assert not (is_power_of_two_f(FIFO_DEPTH) = false) report "NEORV32 CONFIG ERROR: FIFO depth has to be a power of two." severity error;
  assert not (is_power_of_two_f(FIFO_DEPTH) = false) report "NEORV32 CONFIG ERROR: FIFO depth has to be a power of two." severity error;
 
 
 
 
  -- Access Control -------------------------------------------------------------------------
  -- Access Control -------------------------------------------------------------------------
  -- -------------------------------------------------------------------------------------------
  -- -------------------------------------------------------------------------------------------
  fifo.re <= re_i when (FIFO_SAFE = false) else (re_i and fifo.avail);
  fifo.re <= re_i when (FIFO_SAFE = false) else (re_i and fifo.avail); -- read only if data available
  fifo.we <= we_i when (FIFO_SAFE = false) else (we_i and fifo.free);
  fifo.we <= we_i when (FIFO_SAFE = false) else (we_i and fifo.free); -- write only if space left
 
 
 
 
  -- FIFO Control ---------------------------------------------------------------------------
  -- FIFO Control ---------------------------------------------------------------------------
  -- -------------------------------------------------------------------------------------------
  -- -------------------------------------------------------------------------------------------
  fifo_control: process(rstn_i, clk_i)
  fifo_control: process(rstn_i, clk_i)
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  fifo.match <= '1' when (fifo.r_pnt(fifo.r_pnt'left-1 downto 0) = fifo.w_pnt(fifo.w_pnt'left-1 downto 0)) or (FIFO_DEPTH = 1) else '0';
  fifo.match <= '1' when (fifo.r_pnt(fifo.r_pnt'left-1 downto 0) = fifo.w_pnt(fifo.w_pnt'left-1 downto 0)) or (FIFO_DEPTH = 1) else '0';
  fifo.full  <= '1' when (fifo.r_pnt(fifo.r_pnt'left) /= fifo.w_pnt(fifo.w_pnt'left)) and (fifo.match = '1') else '0';
  fifo.full  <= '1' when (fifo.r_pnt(fifo.r_pnt'left) /= fifo.w_pnt(fifo.w_pnt'left)) and (fifo.match = '1') else '0';
  fifo.empty <= '1' when (fifo.r_pnt(fifo.r_pnt'left)  = fifo.w_pnt(fifo.w_pnt'left)) and (fifo.match = '1') else '0';
  fifo.empty <= '1' when (fifo.r_pnt(fifo.r_pnt'left)  = fifo.w_pnt(fifo.w_pnt'left)) and (fifo.match = '1') else '0';
  fifo.free  <= not fifo.full;
  fifo.free  <= not fifo.full;
  fifo.avail <= not fifo.empty;
  fifo.avail <= not fifo.empty;
  fifo.level <= std_ulogic_vector(to_unsigned(FIFO_DEPTH, fifo.level'length)) when (fifo.full = '1') else std_ulogic_vector(unsigned(fifo.w_pnt) - unsigned(fifo.r_pnt));
  level_diff <= std_ulogic_vector(unsigned(fifo.w_pnt) - unsigned(fifo.r_pnt));
 
  fifo.level <= std_ulogic_vector(to_unsigned(FIFO_DEPTH, fifo.level'length)) when (fifo.full = '1') else level_diff;
 
 
  -- status output --
  -- status output --
  level_o <= fifo.level;
  level_o <= fifo.level;
  free_o  <= fifo.free;
  free_o  <= fifo.free;
  avail_o <= fifo.avail;
  avail_o <= fifo.avail;
 
 
 
  fifo_half_level:
 
  if (FIFO_DEPTH > 1) generate
 
    half_o <= level_diff(level_diff'left-1) or fifo.full;
 
  end generate;
 
 
 
  fifo_half_level_simple:
 
  if (FIFO_DEPTH = 1) generate
 
    half_o <= fifo.full;
 
  end generate;
 
 
 
 
  -- FIFO Memory ----------------------------------------------------------------------------
  -- FIFO Memory ----------------------------------------------------------------------------
  -- -------------------------------------------------------------------------------------------
  -- -------------------------------------------------------------------------------------------
  fifo_memory_write: process(clk_i)
  fifo_memory_write: process(clk_i)
  begin
  begin
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  fifo_read_sync:
  fifo_read_sync:
  if (FIFO_RSYNC = true) generate
  if (FIFO_RSYNC = true) generate
    fifo_memory_read: process(clk_i)
    fifo_memory_read: process(clk_i)
    begin
    begin
      if rising_edge(clk_i) then
      if rising_edge(clk_i) then
        if (fifo.re = '1') then
 
          if (FIFO_DEPTH = 1) then
          if (FIFO_DEPTH = 1) then
            rdata_o <= fifo.datas;
            rdata_o <= fifo.datas;
          else
          else
            rdata_o <= fifo.data(to_integer(unsigned(fifo.r_pnt(fifo.r_pnt'left-1 downto 0))));
            rdata_o <= fifo.data(to_integer(unsigned(fifo.r_pnt(fifo.r_pnt'left-1 downto 0))));
          end if;
          end if;
        end if;
        end if;
      end if;
 
    end process fifo_memory_read;
    end process fifo_memory_read;
  end generate;
  end generate;
 
 
 
 
end neorv32_fifo_rtl;
end neorv32_fifo_rtl;

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