| Line 4... |
Line 4... |
-- # Compatible to RISC-V spec's 64-bit MACHINE system timer including "mtime[h]" & "mtimecmp[h]". #
|
-- # Compatible to RISC-V spec's 64-bit MACHINE system timer including "mtime[h]" & "mtimecmp[h]". #
|
-- # Note: The 64-bit counter and compare systems are de-coupled into two 32-bit systems. #
|
-- # Note: The 64-bit counter and compare systems are de-coupled into two 32-bit systems. #
|
-- # ********************************************************************************************* #
|
-- # ********************************************************************************************* #
|
-- # BSD 3-Clause License #
|
-- # BSD 3-Clause License #
|
-- # #
|
-- # #
|
-- # Copyright (c) 2021, Stephan Nolting. All rights reserved. #
|
-- # Copyright (c) 2022, Stephan Nolting. All rights reserved. #
|
-- # #
|
-- # #
|
-- # Redistribution and use in source and binary forms, with or without modification, are #
|
-- # Redistribution and use in source and binary forms, with or without modification, are #
|
-- # permitted provided that the following conditions are met: #
|
-- # permitted provided that the following conditions are met: #
|
-- # #
|
-- # #
|
-- # 1. Redistributions of source code must retain the above copyright notice, this list of #
|
-- # 1. Redistributions of source code must retain the above copyright notice, this list of #
|
| Line 102... |
Line 102... |
-- Write Access ---------------------------------------------------------------------------
|
-- Write Access ---------------------------------------------------------------------------
|
-- -------------------------------------------------------------------------------------------
|
-- -------------------------------------------------------------------------------------------
|
wr_access: process(clk_i)
|
wr_access: process(clk_i)
|
begin
|
begin
|
if rising_edge(clk_i) then
|
if rising_edge(clk_i) then
|
|
-- bus handshake --
|
|
ack_o <= rden or wren;
|
|
|
-- mtimecmp --
|
-- mtimecmp --
|
if (wren = '1') then
|
if (wren = '1') then
|
if (addr = mtime_cmp_lo_addr_c) then
|
if (addr = mtime_cmp_lo_addr_c) then
|
mtimecmp_lo <= data_i;
|
mtimecmp_lo <= data_i;
|
end if;
|
end if;
|
if (addr = mtime_cmp_hi_addr_c) then
|
if (addr = mtime_cmp_hi_addr_c) then
|
mtimecmp_hi <= data_i;
|
mtimecmp_hi <= data_i;
|
end if;
|
end if;
|
end if;
|
end if;
|
|
|
-- mtime access buffer --
|
-- mtime write access buffer --
|
-- wdata_buf <= data_i; -- not required, CPU wdata (=data_i) is stable until transfer is acknowledged
|
if (wren = '1') and (addr = mtime_time_lo_addr_c) then
|
mtime_lo_we <= wren and bool_to_ulogic_f(boolean(addr = mtime_time_lo_addr_c));
|
mtime_lo_we <= '1';
|
mtime_hi_we <= wren and bool_to_ulogic_f(boolean(addr = mtime_time_hi_addr_c));
|
else
|
|
mtime_lo_we <= '0';
|
|
end if;
|
|
--
|
|
if (wren = '1') and (addr = mtime_time_hi_addr_c) then
|
|
mtime_hi_we <= '1';
|
|
else
|
|
mtime_hi_we <= '0';
|
|
end if;
|
|
|
-- mtime low --
|
-- mtime low --
|
if (mtime_lo_we = '1') then -- write access
|
if (mtime_lo_we = '1') then -- write access
|
mtime_lo <= data_i;
|
mtime_lo <= data_i;
|
else -- auto increment
|
else -- auto increment
|
| Line 143... |
Line 154... |
-- Read Access ----------------------------------------------------------------------------
|
-- Read Access ----------------------------------------------------------------------------
|
-- -------------------------------------------------------------------------------------------
|
-- -------------------------------------------------------------------------------------------
|
rd_access: process(clk_i)
|
rd_access: process(clk_i)
|
begin
|
begin
|
if rising_edge(clk_i) then
|
if rising_edge(clk_i) then
|
ack_o <= rden or wren;
|
|
data_o <= (others => '0'); -- default
|
data_o <= (others => '0'); -- default
|
if (rden = '1') then
|
if (rden = '1') then
|
case addr(3 downto 2) is
|
case addr(3 downto 2) is
|
when "00" => data_o <= mtime_lo; -- mtime LOW
|
when "00" => data_o <= mtime_lo; -- mtime low
|
when "01" => data_o <= mtime_hi; -- mtime HIGH
|
when "01" => data_o <= mtime_hi; -- mtime high
|
when "10" => data_o <= mtimecmp_lo; -- mtimecmp LOW
|
when "10" => data_o <= mtimecmp_lo; -- mtimecmp low
|
when others => data_o <= mtimecmp_hi; -- mtimecmp HIGH
|
when others => data_o <= mtimecmp_hi; -- mtimecmp high
|
end case;
|
end case;
|
end if;
|
end if;
|
end if;
|
end if;
|
end process rd_access;
|
end process rd_access;
|
|
|
