| Line 101... |
Line 101... |
IO_TWI_EN : boolean := true; -- implement two-wire interface (TWI)?
|
IO_TWI_EN : boolean := true; -- implement two-wire interface (TWI)?
|
IO_PWM_EN : boolean := true; -- implement pulse-width modulation unit (PWM)?
|
IO_PWM_EN : boolean := true; -- implement pulse-width modulation unit (PWM)?
|
IO_WDT_EN : boolean := true; -- implement watch dog timer (WDT)?
|
IO_WDT_EN : boolean := true; -- implement watch dog timer (WDT)?
|
IO_TRNG_EN : boolean := false; -- implement true random number generator (TRNG)?
|
IO_TRNG_EN : boolean := false; -- implement true random number generator (TRNG)?
|
IO_CFS_EN : boolean := false; -- implement custom functions subsystem (CFS)?
|
IO_CFS_EN : boolean := false; -- implement custom functions subsystem (CFS)?
|
IO_CFS_CONFIG : std_ulogic_vector(31 downto 0) := x"00000000"; -- custom CFS configuration generic
|
IO_CFS_CONFIG : std_ulogic_vector(31 downto 0); -- custom CFS configuration generic
|
IO_NCO_EN : boolean := true -- implement numerically-controlled oscillator (NCO)?
|
IO_CFS_IN_SIZE : positive := 32; -- size of CFS input conduit in bits
|
|
IO_CFS_OUT_SIZE : positive := 32; -- size of CFS output conduit in bits
|
|
IO_NCO_EN : boolean := true; -- implement numerically-controlled oscillator (NCO)?
|
|
IO_NEOLED_EN : boolean := true -- implement NeoPixel-compatible smart LED interface (NEOLED)?
|
);
|
);
|
port (
|
port (
|
-- Global control --
|
-- Global control --
|
clk_i : in std_ulogic := '0'; -- global clock, rising edge
|
clk_i : in std_ulogic := '0'; -- global clock, rising edge
|
rstn_i : in std_ulogic := '0'; -- global reset, low-active, async
|
rstn_i : in std_ulogic := '0'; -- global reset, low-active, async
|
| Line 156... |
Line 159... |
|
|
-- PWM (available if IO_PWM_EN = true) --
|
-- PWM (available if IO_PWM_EN = true) --
|
pwm_o : out std_ulogic_vector(03 downto 0); -- pwm channels
|
pwm_o : out std_ulogic_vector(03 downto 0); -- pwm channels
|
|
|
-- Custom Functions Subsystem IO (available if IO_CFS_EN = true) --
|
-- Custom Functions Subsystem IO (available if IO_CFS_EN = true) --
|
cfs_in_i : in std_ulogic_vector(31 downto 0) := (others => '0'); -- custom CFS inputs conduit
|
cfs_in_i : in std_ulogic_vector(IO_CFS_IN_SIZE-1 downto 0); -- custom CFS inputs conduit
|
cfs_out_o : out std_ulogic_vector(31 downto 0); -- custom CFS outputs conduit
|
cfs_out_o : out std_ulogic_vector(IO_CFS_OUT_SIZE-1 downto 0); -- custom CFS outputs conduit
|
|
|
-- NCO output (available if IO_NCO_EN = true) --
|
-- NCO output (available if IO_NCO_EN = true) --
|
nco_o : out std_ulogic_vector(02 downto 0); -- numerically-controlled oscillator channels
|
nco_o : out std_ulogic_vector(02 downto 0); -- numerically-controlled oscillator channels
|
|
|
|
-- NeoPixel-compatible smart LED interface (available if IO_NEOLED_EN = true) --
|
|
neoled_o : out std_ulogic; -- async serial data line
|
|
|
-- system time input from external MTIME (available if IO_MTIME_EN = false) --
|
-- system time input from external MTIME (available if IO_MTIME_EN = false) --
|
mtime_i : in std_ulogic_vector(63 downto 0) := (others => '0'); -- current system time
|
mtime_i : in std_ulogic_vector(63 downto 0) := (others => '0'); -- current system time
|
|
|
-- Interrupts --
|
-- Interrupts --
|
soc_firq_i : in std_ulogic_vector(5 downto 0) := (others => '0'); -- fast interrupt channels
|
soc_firq_i : in std_ulogic_vector(5 downto 0) := (others => '0'); -- fast interrupt channels
|
| Line 199... |
Line 205... |
|
|
-- clock generator --
|
-- clock generator --
|
signal clk_div : std_ulogic_vector(11 downto 0);
|
signal clk_div : std_ulogic_vector(11 downto 0);
|
signal clk_div_ff : std_ulogic_vector(11 downto 0);
|
signal clk_div_ff : std_ulogic_vector(11 downto 0);
|
signal clk_gen : std_ulogic_vector(07 downto 0);
|
signal clk_gen : std_ulogic_vector(07 downto 0);
|
signal clk_gen_en : std_ulogic_vector(07 downto 0);
|
signal clk_gen_en : std_ulogic_vector(08 downto 0);
|
--
|
--
|
signal wdt_cg_en : std_ulogic;
|
signal wdt_cg_en : std_ulogic;
|
signal uart0_cg_en : std_ulogic;
|
signal uart0_cg_en : std_ulogic;
|
signal uart1_cg_en : std_ulogic;
|
signal uart1_cg_en : std_ulogic;
|
signal spi_cg_en : std_ulogic;
|
signal spi_cg_en : std_ulogic;
|
signal twi_cg_en : std_ulogic;
|
signal twi_cg_en : std_ulogic;
|
signal pwm_cg_en : std_ulogic;
|
signal pwm_cg_en : std_ulogic;
|
signal cfs_cg_en : std_ulogic;
|
signal cfs_cg_en : std_ulogic;
|
signal nco_cg_en : std_ulogic;
|
signal nco_cg_en : std_ulogic;
|
|
signal neoled_cg_en : std_ulogic;
|
|
|
-- bus interface --
|
-- bus interface --
|
type bus_interface_t is record
|
type bus_interface_t is record
|
addr : std_ulogic_vector(data_width_c-1 downto 0); -- bus access address
|
addr : std_ulogic_vector(data_width_c-1 downto 0); -- bus access address
|
rdata : std_ulogic_vector(data_width_c-1 downto 0); -- bus read data
|
rdata : std_ulogic_vector(data_width_c-1 downto 0); -- bus read data
|
| Line 265... |
Line 272... |
signal trng_ack : std_ulogic;
|
signal trng_ack : std_ulogic;
|
signal cfs_rdata : std_ulogic_vector(data_width_c-1 downto 0);
|
signal cfs_rdata : std_ulogic_vector(data_width_c-1 downto 0);
|
signal cfs_ack : std_ulogic;
|
signal cfs_ack : std_ulogic;
|
signal nco_rdata : std_ulogic_vector(data_width_c-1 downto 0);
|
signal nco_rdata : std_ulogic_vector(data_width_c-1 downto 0);
|
signal nco_ack : std_ulogic;
|
signal nco_ack : std_ulogic;
|
|
signal neoled_rdata : std_ulogic_vector(data_width_c-1 downto 0);
|
|
signal neoled_ack : std_ulogic;
|
signal sysinfo_rdata : std_ulogic_vector(data_width_c-1 downto 0);
|
signal sysinfo_rdata : std_ulogic_vector(data_width_c-1 downto 0);
|
signal sysinfo_ack : std_ulogic;
|
signal sysinfo_ack : std_ulogic;
|
|
|
-- IRQs --
|
-- IRQs --
|
signal mtime_irq : std_ulogic;
|
signal mtime_irq : std_ulogic;
|
| Line 284... |
Line 293... |
signal uart1_txd_irq : std_ulogic;
|
signal uart1_txd_irq : std_ulogic;
|
signal spi_irq : std_ulogic;
|
signal spi_irq : std_ulogic;
|
signal twi_irq : std_ulogic;
|
signal twi_irq : std_ulogic;
|
signal cfs_irq : std_ulogic;
|
signal cfs_irq : std_ulogic;
|
signal cfs_irq_ack : std_ulogic;
|
signal cfs_irq_ack : std_ulogic;
|
|
signal neoled_irq : std_ulogic;
|
|
|
-- misc --
|
-- misc --
|
signal mtime_time : std_ulogic_vector(63 downto 0); -- current system time from MTIME
|
signal mtime_time : std_ulogic_vector(63 downto 0); -- current system time from MTIME
|
signal cpu_sleep : std_ulogic; -- CPU is in sleep mode when set
|
signal cpu_sleep : std_ulogic; -- CPU is in sleep mode when set
|
|
|
| Line 362... |
Line 372... |
clk_gen_en(3) <= spi_cg_en;
|
clk_gen_en(3) <= spi_cg_en;
|
clk_gen_en(4) <= twi_cg_en;
|
clk_gen_en(4) <= twi_cg_en;
|
clk_gen_en(5) <= pwm_cg_en;
|
clk_gen_en(5) <= pwm_cg_en;
|
clk_gen_en(6) <= cfs_cg_en;
|
clk_gen_en(6) <= cfs_cg_en;
|
clk_gen_en(7) <= nco_cg_en;
|
clk_gen_en(7) <= nco_cg_en;
|
|
clk_gen_en(8) <= neoled_cg_en;
|
if (or_all_f(clk_gen_en) = '1') then
|
if (or_all_f(clk_gen_en) = '1') then
|
clk_div <= std_ulogic_vector(unsigned(clk_div) + 1);
|
clk_div <= std_ulogic_vector(unsigned(clk_div) + 1);
|
end if;
|
end if;
|
clk_div_ff <= clk_div;
|
clk_div_ff <= clk_div;
|
end if;
|
end if;
|
| Line 398... |
Line 409... |
-- RISC-V CPU Extensions --
|
-- RISC-V CPU Extensions --
|
CPU_EXTENSION_RISCV_A => CPU_EXTENSION_RISCV_A, -- implement atomic extension?
|
CPU_EXTENSION_RISCV_A => CPU_EXTENSION_RISCV_A, -- implement atomic extension?
|
CPU_EXTENSION_RISCV_B => CPU_EXTENSION_RISCV_B, -- implement bit manipulation extensions?
|
CPU_EXTENSION_RISCV_B => CPU_EXTENSION_RISCV_B, -- implement bit manipulation extensions?
|
CPU_EXTENSION_RISCV_C => CPU_EXTENSION_RISCV_C, -- implement compressed extension?
|
CPU_EXTENSION_RISCV_C => CPU_EXTENSION_RISCV_C, -- implement compressed extension?
|
CPU_EXTENSION_RISCV_E => CPU_EXTENSION_RISCV_E, -- implement embedded RF extension?
|
CPU_EXTENSION_RISCV_E => CPU_EXTENSION_RISCV_E, -- implement embedded RF extension?
|
|
CPU_EXTENSION_RISCV_F => false, -- implement 32-bit floating-point extension?
|
CPU_EXTENSION_RISCV_M => CPU_EXTENSION_RISCV_M, -- implement muld/div extension?
|
CPU_EXTENSION_RISCV_M => CPU_EXTENSION_RISCV_M, -- implement muld/div extension?
|
CPU_EXTENSION_RISCV_U => CPU_EXTENSION_RISCV_U, -- implement user mode extension?
|
CPU_EXTENSION_RISCV_U => CPU_EXTENSION_RISCV_U, -- implement user mode extension?
|
CPU_EXTENSION_RISCV_Zicsr => CPU_EXTENSION_RISCV_Zicsr, -- implement CSR system?
|
CPU_EXTENSION_RISCV_Zicsr => CPU_EXTENSION_RISCV_Zicsr, -- implement CSR system?
|
CPU_EXTENSION_RISCV_Zifencei => CPU_EXTENSION_RISCV_Zifencei, -- implement instruction stream sync.?
|
CPU_EXTENSION_RISCV_Zifencei => CPU_EXTENSION_RISCV_Zifencei, -- implement instruction stream sync.?
|
-- Extension Options --
|
-- Extension Options --
|
| Line 471... |
Line 483... |
fast_irq(04) <= uart1_rxd_irq; -- secondary UART (UART1) data received
|
fast_irq(04) <= uart1_rxd_irq; -- secondary UART (UART1) data received
|
fast_irq(05) <= uart1_txd_irq; -- secondary UART (UART1) sending done
|
fast_irq(05) <= uart1_txd_irq; -- secondary UART (UART1) sending done
|
fast_irq(06) <= spi_irq; -- SPI transmission done
|
fast_irq(06) <= spi_irq; -- SPI transmission done
|
fast_irq(07) <= twi_irq; -- TWI transmission done
|
fast_irq(07) <= twi_irq; -- TWI transmission done
|
fast_irq(08) <= gpio_irq; -- GPIO pin-change
|
fast_irq(08) <= gpio_irq; -- GPIO pin-change
|
fast_irq(09) <= '0'; -- reserved
|
fast_irq(09) <= neoled_irq; -- NEOLED buffer free
|
|
|
-- fast interrupts - platform level (for custom use) --
|
-- fast interrupts - platform level (for custom use) --
|
fast_irq(10) <= soc_firq_i(0);
|
fast_irq(10) <= soc_firq_i(0);
|
fast_irq(11) <= soc_firq_i(1);
|
fast_irq(11) <= soc_firq_i(1);
|
fast_irq(12) <= soc_firq_i(2);
|
fast_irq(12) <= soc_firq_i(2);
|
| Line 589... |
Line 601... |
p_bus_err_i => p_bus.err -- bus transfer error
|
p_bus_err_i => p_bus.err -- bus transfer error
|
);
|
);
|
|
|
-- processor bus: CPU transfer data input --
|
-- processor bus: CPU transfer data input --
|
p_bus.rdata <= (imem_rdata or dmem_rdata or bootrom_rdata) or wishbone_rdata or (gpio_rdata or mtime_rdata or uart0_rdata or uart1_rdata or
|
p_bus.rdata <= (imem_rdata or dmem_rdata or bootrom_rdata) or wishbone_rdata or (gpio_rdata or mtime_rdata or uart0_rdata or uart1_rdata or
|
spi_rdata or twi_rdata or pwm_rdata or wdt_rdata or trng_rdata or cfs_rdata or nco_rdata or sysinfo_rdata);
|
spi_rdata or twi_rdata or pwm_rdata or wdt_rdata or trng_rdata or cfs_rdata or nco_rdata or neoled_rdata or sysinfo_rdata);
|
|
|
-- processor bus: CPU transfer ACK input --
|
-- processor bus: CPU transfer ACK input --
|
p_bus.ack <= (imem_ack or dmem_ack or bootrom_ack) or wishbone_ack or (gpio_ack or mtime_ack or uart0_ack or uart1_ack or
|
p_bus.ack <= (imem_ack or dmem_ack or bootrom_ack) or wishbone_ack or (gpio_ack or mtime_ack or uart0_ack or uart1_ack or
|
spi_ack or twi_ack or pwm_ack or wdt_ack or trng_ack or cfs_ack or nco_ack or sysinfo_ack);
|
spi_ack or twi_ack or pwm_ack or wdt_ack or trng_ack or cfs_ack or nco_ack or neoled_ack or sysinfo_ack);
|
|
|
-- processor bus: CPU transfer data bus error input --
|
-- processor bus: CPU transfer data bus error input --
|
p_bus.err <= wishbone_err;
|
p_bus.err <= wishbone_err;
|
|
|
-- current CPU privilege level --
|
-- current CPU privilege level --
|
| Line 762... |
Line 774... |
-- -------------------------------------------------------------------------------------------
|
-- -------------------------------------------------------------------------------------------
|
neorv32_cfs_inst_true:
|
neorv32_cfs_inst_true:
|
if (IO_CFS_EN = true) generate
|
if (IO_CFS_EN = true) generate
|
neorv32_cfs_inst: neorv32_cfs
|
neorv32_cfs_inst: neorv32_cfs
|
generic map (
|
generic map (
|
CFS_CONFIG => IO_CFS_CONFIG -- custom CFS configuration generic
|
CFS_CONFIG => IO_CFS_CONFIG, -- custom CFS configuration generic
|
|
CFS_IN_SIZE => IO_CFS_IN_SIZE, -- size of CFS input conduit in bits
|
|
CFS_OUT_SIZE => IO_CFS_OUT_SIZE -- size of CFS output conduit in bits
|
)
|
)
|
port map (
|
port map (
|
-- host access --
|
-- host access --
|
clk_i => clk_i, -- global clock line
|
clk_i => clk_i, -- global clock line
|
rstn_i => sys_rstn, -- global reset line, low-active, use as async
|
rstn_i => sys_rstn, -- global reset line, low-active, use as async
|
| Line 1143... |
Line 1157... |
trng_rdata <= (others => '0');
|
trng_rdata <= (others => '0');
|
trng_ack <= '0';
|
trng_ack <= '0';
|
end generate;
|
end generate;
|
|
|
|
|
|
-- Smart LED (WS2811/WS2812) Interface (NEOLED) -------------------------------------------
|
|
-- -------------------------------------------------------------------------------------------
|
|
neorv32_neoled_inst_true:
|
|
if (IO_NEOLED_EN = true) generate
|
|
neorv32_neoled_inst: neorv32_neoled
|
|
port map (
|
|
-- host access --
|
|
clk_i => clk_i, -- global clock line
|
|
addr_i => p_bus.addr, -- address
|
|
rden_i => io_rden, -- read enable
|
|
wren_i => io_wren, -- write enable
|
|
data_i => p_bus.wdata, -- data in
|
|
data_o => neoled_rdata, -- data out
|
|
ack_o => neoled_ack, -- transfer acknowledge
|
|
-- clock generator --
|
|
clkgen_en_o => neoled_cg_en, -- enable clock generator
|
|
clkgen_i => clk_gen,
|
|
-- interrupt --
|
|
irq_o => neoled_irq, -- interrupt request
|
|
-- NEOLED output --
|
|
neoled_o => neoled_o -- serial async data line
|
|
);
|
|
end generate;
|
|
|
|
neorv32_neoled_inst_false:
|
|
if (IO_NEOLED_EN = false) generate
|
|
neoled_rdata <= (others => '0');
|
|
neoled_ack <= '0';
|
|
neoled_cg_en <= '0';
|
|
neoled_irq <= '0';
|
|
neoled_o <= '0';
|
|
end generate;
|
|
|
|
|
-- System Configuration Information Memory (SYSINFO) --------------------------------------
|
-- System Configuration Information Memory (SYSINFO) --------------------------------------
|
-- -------------------------------------------------------------------------------------------
|
-- -------------------------------------------------------------------------------------------
|
neorv32_sysinfo_inst: neorv32_sysinfo
|
neorv32_sysinfo_inst: neorv32_sysinfo
|
generic map (
|
generic map (
|
-- General --
|
-- General --
|
| Line 1176... |
Line 1224... |
IO_TWI_EN => IO_TWI_EN, -- implement two-wire interface (TWI)?
|
IO_TWI_EN => IO_TWI_EN, -- implement two-wire interface (TWI)?
|
IO_PWM_EN => IO_PWM_EN, -- implement pulse-width modulation unit (PWM)?
|
IO_PWM_EN => IO_PWM_EN, -- implement pulse-width modulation unit (PWM)?
|
IO_WDT_EN => IO_WDT_EN, -- implement watch dog timer (WDT)?
|
IO_WDT_EN => IO_WDT_EN, -- implement watch dog timer (WDT)?
|
IO_TRNG_EN => IO_TRNG_EN, -- implement true random number generator (TRNG)?
|
IO_TRNG_EN => IO_TRNG_EN, -- implement true random number generator (TRNG)?
|
IO_CFS_EN => IO_CFS_EN, -- implement custom functions subsystem (CFS)?
|
IO_CFS_EN => IO_CFS_EN, -- implement custom functions subsystem (CFS)?
|
IO_NCO_EN => IO_NCO_EN -- implement numerically-controlled oscillator (NCO)?
|
IO_NCO_EN => IO_NCO_EN, -- implement numerically-controlled oscillator (NCO)?
|
|
IO_NEOLED_EN => IO_NEOLED_EN -- implement NeoPixel-compatible smart LED interface (NEOLED)?
|
)
|
)
|
port map (
|
port map (
|
-- host access --
|
-- host access --
|
clk_i => clk_i, -- global clock line
|
clk_i => clk_i, -- global clock line
|
addr_i => p_bus.addr, -- address
|
addr_i => p_bus.addr, -- address
|
