| Line 165... |
Line 165... |
CPU_EXTENSION_RISCV_U => true, -- implement user mode extension?
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CPU_EXTENSION_RISCV_U => true, -- implement user mode extension?
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CPU_EXTENSION_RISCV_Zicsr => true, -- implement CSR system?
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CPU_EXTENSION_RISCV_Zicsr => true, -- implement CSR system?
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CPU_EXTENSION_RISCV_Zifencei => true, -- implement instruction stream sync.?
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CPU_EXTENSION_RISCV_Zifencei => true, -- implement instruction stream sync.?
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-- Extension Options --
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-- Extension Options --
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FAST_MUL_EN => false, -- use DSPs for M extension's multiplier
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FAST_MUL_EN => false, -- use DSPs for M extension's multiplier
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FAST_SHIFT_EN => false, -- use barrel shifter for shift operations
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-- Physical Memory Protection (PMP) --
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-- Physical Memory Protection (PMP) --
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PMP_USE => true, -- implement PMP?
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PMP_USE => true, -- implement PMP?
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PMP_NUM_REGIONS => 4, -- number of regions (max 16)
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PMP_NUM_REGIONS => 4, -- number of regions (max 16)
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PMP_GRANULARITY => 14, -- minimal region granularity (1=8B, 2=16B, 3=32B, ...) default is 64k
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PMP_GRANULARITY => 14, -- minimal region granularity (1=8B, 2=16B, 3=32B, ...) default is 64k
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-- Internal Instruction memory --
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-- Internal Instruction memory --
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| Line 188... |
Line 189... |
IO_SPI_USE => true, -- implement serial peripheral interface (SPI)?
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IO_SPI_USE => true, -- implement serial peripheral interface (SPI)?
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IO_TWI_USE => true, -- implement two-wire interface (TWI)?
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IO_TWI_USE => true, -- implement two-wire interface (TWI)?
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IO_PWM_USE => true, -- implement pulse-width modulation unit (PWM)?
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IO_PWM_USE => true, -- implement pulse-width modulation unit (PWM)?
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IO_WDT_USE => true, -- implement watch dog timer (WDT)?
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IO_WDT_USE => true, -- implement watch dog timer (WDT)?
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IO_TRNG_USE => false, -- DEFAULT TRNG CONFIG CANNOT BE SIMULATED!
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IO_TRNG_USE => false, -- DEFAULT TRNG CONFIG CANNOT BE SIMULATED!
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IO_CFU_USE => true -- implement custom functions unit (CFU)?
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IO_CFU0_USE => true, -- implement custom functions unit 0 (CFU0)?
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|
IO_CFU1_USE => true -- implement custom functions unit 1 (CFU1)?
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)
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)
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port map (
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port map (
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-- Global control --
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-- Global control --
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clk_i => clk_gen, -- global clock, rising edge
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clk_i => clk_gen, -- global clock, rising edge
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rstn_i => rst_gen, -- global reset, low-active, async
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rstn_i => rst_gen, -- global reset, low-active, async
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| Line 224... |
Line 226... |
twi_sda_io => twi_sda, -- twi serial data line
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twi_sda_io => twi_sda, -- twi serial data line
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twi_scl_io => twi_scl, -- twi serial clock line
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twi_scl_io => twi_scl, -- twi serial clock line
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-- PWM --
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-- PWM --
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pwm_o => open, -- pwm channels
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pwm_o => open, -- pwm channels
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-- Interrupts --
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-- Interrupts --
|
|
mtime_irq_i => '0', -- machine software interrupt, available if IO_MTIME_USE = false
|
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msw_irq_i => '0', -- machine software interrupt
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mext_irq_i => '0' -- machine external interrupt
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mext_irq_i => '0' -- machine external interrupt
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);
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);
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|
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-- TWI termination --
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-- TWI termination --
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twi_scl <= 'H';
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twi_scl <= 'H';
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