| Line 4... |
Line 4... |
// # In order to run the bootloader on any CPU configuration, the bootloader should be compiled #
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// # In order to run the bootloader on any CPU configuration, the bootloader should be compiled #
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// # unsing the base ISA (rv32i/rv32e) only. #
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// # unsing the base ISA (rv32i/rv32e) only. #
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// # ********************************************************************************************* #
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// # ********************************************************************************************* #
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// # Boot from (internal) instruction memory, UART or SPI Flash. #
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// # Boot from (internal) instruction memory, UART or SPI Flash. #
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// # #
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// # #
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// # UART configuration: 8 data bits, no parity bit, 1 stop bit, 19200 baud #
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// # UART configuration: 8 data bits, NO parity bit, 1 stop bit, 19200 baud (19200-8N1) #
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// # Boot Flash: 8-bit SPI, 24-bit addresses (like Micron N25Q032A) @ neorv32.spi_csn_o(0) #
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// # Boot Flash: 8-bit SPI, 24-bit addresses (like Micron N25Q032A) @ neorv32.spi_csn_o(0) #
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// # neorv32.gpio_o(0) is used as high-active status LED (can be disabled via #STATUS_LED_EN). #
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// # neorv32.gpio_o(0) is used as high-active status LED (can be disabled via #STATUS_LED_EN). #
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// # #
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// # #
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// # Auto boot sequence (can be disabled via #AUTOBOOT_EN) after timeout (via #AUTOBOOT_TIMEOUT): #
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// # Auto boot sequence (can be disabled via #AUTOBOOT_EN) after timeout (via #AUTOBOOT_TIMEOUT): #
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// # -> Try booting from SPI flash at spi_csn_o(0). #
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// # -> Try booting from SPI flash at spi_csn_o(0). #
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| Line 218... |
Line 218... |
if (STATUS_LED_EN == 1) {
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if (STATUS_LED_EN == 1) {
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// activate status LED, clear all others
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// activate status LED, clear all others
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neorv32_gpio_port_set(1 << STATUS_LED);
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neorv32_gpio_port_set(1 << STATUS_LED);
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}
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}
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|
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// init UART (no interrupts)
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// init UART (no parity bit, no interrupts)
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neorv32_uart_setup(BAUD_RATE, 0, 0);
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neorv32_uart_setup(BAUD_RATE, 0, 0, 0);
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|
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// Configure machine system timer interrupt for ~2Hz
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// Configure machine system timer interrupt for ~2Hz
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neorv32_mtime_set_timecmp(neorv32_mtime_get_time() + (clock_speed/4));
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neorv32_mtime_set_timecmp(neorv32_mtime_get_time() + (clock_speed/4));
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|
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neorv32_cpu_csr_write(CSR_MIE, 1 << CPU_MIE_MTIE); // activate MTIME IRQ source
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neorv32_cpu_csr_write(CSR_MIE, 1 << CSR_MIE_MTIE); // activate MTIME IRQ source
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neorv32_cpu_eint(); // enable global interrupts
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neorv32_cpu_eint(); // enable global interrupts
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// ------------------------------------------------
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// ------------------------------------------------
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// Fast boot mode: Direct SPI boot
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// Fast boot mode: Direct SPI boot
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