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// #################################################################################################
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// #################################################################################################
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// # << NEORV32 - RISC-V Single-Precision Floating-Point 'Zfinx' Extension Verification Program >> #
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// # << NEORV32 - RISC-V Single-Precision Floating-Point 'Zfinx' Extension Verification Program >> #
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// # ********************************************************************************************* #
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// # ********************************************************************************************* #
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// # BSD 3-Clause License #
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// # BSD 3-Clause License #
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// # #
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// # #
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// # Copyright (c) 2021, Stephan Nolting. All rights reserved. #
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// # Copyright (c) 2022, Stephan Nolting. All rights reserved. #
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// # #
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// # #
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// # Redistribution and use in source and binary forms, with or without modification, are #
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// # Redistribution and use in source and binary forms, with or without modification, are #
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// # permitted provided that the following conditions are met: #
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// # permitted provided that the following conditions are met: #
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// # #
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// # #
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// # 1. Redistributions of source code must retain the above copyright notice, this list of #
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// # 1. Redistributions of source code must retain the above copyright notice, this list of #
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// check available hardware extensions and compare with compiler flags
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// check available hardware extensions and compare with compiler flags
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neorv32_rte_check_isa(0); // silent = 0 -> show message if isa mismatch
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neorv32_rte_check_isa(0); // silent = 0 -> show message if isa mismatch
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// check if Zfinx extension is implemented at all
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// check if Zfinx extension is implemented at all
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if ((NEORV32_SYSINFO.CPU & (1<<SYSINFO_CPU_ZFINX)) == 0) {
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if ((neorv32_cpu_csr_read(CSR_MXISA) & (1<<CSR_MXISA_ZFINX)) == 0) {
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neorv32_uart0_print("Error! <Zfinx> extension not synthesized!\n");
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neorv32_uart0_print("Error! <Zfinx> extension not synthesized!\n");
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return 1;
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return 1;
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}
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}
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