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CLK_PRSC_4096 = 7 /**< CPU_CLK / 4096 */
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CLK_PRSC_4096 = 7 /**< CPU_CLK / 4096 */
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};
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};
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/**********************************************************************//**
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/**********************************************************************//**
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* Official NEORV32 open-source architecture ID (https://github.com/riscv/riscv-isa-manual/blob/master/marchid.md)
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**************************************************************************/
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#define NEORV32_ARCHID 19
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/**********************************************************************//**
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* @name Helper macros for easy memory-mapped register access
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* @name Helper macros for easy memory-mapped register access
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**************************************************************************/
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**************************************************************************/
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/**@{*/
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/**@{*/
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/** memory-mapped byte (8-bit) read/write register */
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/** memory-mapped byte (8-bit) read/write register */
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#define IO_REG8 (volatile uint8_t*)
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#define IO_REG8 (volatile uint8_t*)
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