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[/] [neorv32/] [trunk/] [sw/] [lib/] [include/] [neorv32.h] - Diff between revs 52 and 53

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Rev 52 Rev 53
Line 438... Line 438...
 
 
/**********************************************************************//**
/**********************************************************************//**
 * CPU <b>mzext</b> custom CSR (r/-): Implemented Z* CPU extensions
 * CPU <b>mzext</b> custom CSR (r/-): Implemented Z* CPU extensions
 **************************************************************************/
 **************************************************************************/
enum NEORV32_CSR_MZEXT_enum {
enum NEORV32_CSR_MZEXT_enum {
  CSR_MZEXT_ZICSR    = 0, /**< CPU mzext CSR (0): Zicsr extension available when set (r/-) */
  CSR_MZEXT_ZICSR    = 0, /**< CPU mzext CSR (0): Zicsr extension (I sub-extension) available when set (r/-) */
  CSR_MZEXT_ZIFENCEI = 1, /**< CPU mzext CSR (1): Zifencei extension available when set (r/-) */
  CSR_MZEXT_ZIFENCEI = 1, /**< CPU mzext CSR (1): Zifencei extension (I sub-extension) available when set (r/-) */
  CSR_MZEXT_ZBB      = 2, /**< CPU mzext CSR (2): Zbb extension available when set (r/-) */
  CSR_MZEXT_ZBB      = 2, /**< CPU mzext CSR (2): Zbb extension (B sub-extension) available when set (r/-) */
  CSR_MZEXT_ZBS      = 3  /**< CPU mzext CSR (3): Zbs extension available when set (r/-) */
  CSR_MZEXT_ZBS      = 3, /**< CPU mzext CSR (3): Zbs extension (B sub-extension) available when set (r/-) */
 
  CSR_MZEXT_ZBA      = 4, /**< CPU mzext CSR (4): Zba extension (B sub-extension) available when set (r/-) */
 
  CSR_MZEXT_ZFINX    = 5  /**< CPU mzext CSR (5): Zfinx extension (F sub-/alternative-extension) available when set (r/-) */
};
};
 
 
 
 
/**********************************************************************//**
/**********************************************************************//**
 * CPU <b>mhpmevent</b> hardware performance monitor events
 * CPU <b>mhpmevent</b> hardware performance monitor events

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