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Subversion Repositories neorv32

[/] [neorv32/] [trunk/] [sw/] [lib/] [include/] [neorv32_intrinsics.h] - Diff between revs 71 and 72

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Rev 71	Rev 72
Line 152...	Line 152...
`asm(".set regnum_s11 , 27");`	`asm(".set regnum_s11 , 27");`
`asm(".set regnum_t3 , 28");`	`asm(".set regnum_t3 , 28");`
`asm(".set regnum_t4 , 29");`	`asm(".set regnum_t4 , 29");`
`asm(".set regnum_t5 , 30");`	`asm(".set regnum_t5 , 30");`
`asm(".set regnum_t6 , 31");`	`asm(".set regnum_t6 , 31");`

	`/** Official RISC-V opcodes for custom extensions (CUSTOM0, CUSTOM1) */`
	`asm(".set RISCV_OPCODE_CUSTOM0 , 0b0001011");`
	`asm(".set RISCV_OPCODE_CUSTOM1 , 0b0101011");`
`/*@}/`	`/*@}/`


`/********************************************************************//`	`/********************************************************************//`
`* @name Custom instruction R1-type format`	`* @name Custom instruction R1-type format`
Line 191...	Line 195...
`({ \`	`({ \`
`register uint32_t __return; \`	`register uint32_t __return; \`
`asm volatile ( \`	`asm volatile ( \`
`"" \`	`"" \`
`: [output] "=r" (__return) \`	`: [output] "=r" (__return) \`
`: [input_i] "r" (rs1), [input_j] "r" (rs2) \`	`: [input_i] "r" (rs1), \`
	`[input_j] "r" (rs2) \`
`); \`	`); \`
`asm volatile ( \`	`asm volatile ( \`
`".word ( \`	`".word ( \`
`(((" #funct7 ") & 0x7f) << 25) \| \`	`(((" #funct7 ") & 0x7f) << 25) \| \`
`((( regnum_%2 ) & 0x1f) << 20) \| \`	`((( regnum_%2 ) & 0x1f) << 20) \| \`
Line 203...	Line 208...
`(((" #funct3 ") & 0x07) << 12) \| \`	`(((" #funct3 ") & 0x07) << 12) \| \`
`((( regnum_%0 ) & 0x1f) << 7) \| \`	`((( regnum_%0 ) & 0x1f) << 7) \| \`
`(((" #opcode ") & 0x7f) << 0) \`	`(((" #opcode ") & 0x7f) << 0) \`
`);" \`	`);" \`
`: [rd] "=r" (__return) \`	`: [rd] "=r" (__return) \`
`: "r" (rs1), "r" (rs2) \`	`: "r" (rs1), \`
	`"r" (rs2) \`
`); \`	`); \`
`__return; \`	`__return; \`
`})`	`})`


Line 218...	Line 224...
`({ \`	`({ \`
`register uint32_t __return; \`	`register uint32_t __return; \`
`asm volatile ( \`	`asm volatile ( \`
`"" \`	`"" \`
`: [output] "=r" (__return) \`	`: [output] "=r" (__return) \`
`: [input_i] "r" (rs1), [input_j] "r" (rs2), [input_k] "r" (rs3) \`	`: [input_i] "r" (rs1), \`
	`[input_j] "r" (rs2), \`
	`[input_k] "r" (rs3) \`
`); \`	`); \`
`asm volatile ( \`	`asm volatile ( \`
`".word ( \`	`".word ( \`
`((( regnum_%3 ) & 0x1f) << 25) \| \`	`((( regnum_%3 ) & 0x1f) << 25) \| \`
`((( regnum_%2 ) & 0x1f) << 20) \| \`	`((( regnum_%2 ) & 0x1f) << 20) \| \`
Line 230...	Line 238...
`(((" #funct3 ") & 0x07) << 12) \| \`	`(((" #funct3 ") & 0x07) << 12) \| \`
`((( regnum_%0 ) & 0x1f) << 7) \| \`	`((( regnum_%0 ) & 0x1f) << 7) \| \`
`(((" #opcode ") & 0x7f) << 0) \`	`(((" #opcode ") & 0x7f) << 0) \`
`);" \`	`);" \`
`: [rd] "=r" (__return) \`	`: [rd] "=r" (__return) \`
`: "r" (rs1), "r" (rs2), "r" (rs3) \`	`: "r" (rs1), \`
	`"r" (rs2), \`
	`"r" (rs3) \`
`); \`	`); \`
`__return; \`	`__return; \`
`})`	`})`

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[/] [neorv32/] [trunk/] [sw/] [lib/] [include/] [neorv32_intrinsics.h] - Diff between revs 71 and 72