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https://opencores.org/ocsvn/neorv32/neorv32/trunk
[/] [neorv32/] [trunk/] [sw/] [lib/] [source/] [neorv32_rte.c] - Diff between revs 34 and 35
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| Rev 34 |
Rev 35 |
| Line 225... |
Line 225... |
case TRAP_CODE_FIRQ_3: neorv32_uart_print("Fast interrupt 3"); break;
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case TRAP_CODE_FIRQ_3: neorv32_uart_print("Fast interrupt 3"); break;
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default: neorv32_uart_print("Unknown trap cause: "); __neorv32_rte_print_hex_word(trap_cause); break;
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default: neorv32_uart_print("Unknown trap cause: "); __neorv32_rte_print_hex_word(trap_cause); break;
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}
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}
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// instruction address
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// instruction address
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neorv32_uart_print(" @ ");
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neorv32_uart_print(" @ PC=");
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__neorv32_rte_print_hex_word(neorv32_cpu_csr_read(CSR_MSCRATCH)); // rte core stores actual mepc to mscratch
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__neorv32_rte_print_hex_word(neorv32_cpu_csr_read(CSR_MSCRATCH)); // rte core stores actual mepc to mscratch
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// additional info
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// additional info
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neorv32_uart_print(", MTVAL=");
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neorv32_uart_print(", MTVAL=");
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__neorv32_rte_print_hex_word(neorv32_cpu_csr_read(CSR_MTVAL));
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__neorv32_rte_print_hex_word(neorv32_cpu_csr_read(CSR_MTVAL));
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| Line 324... |
Line 324... |
}
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}
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}
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}
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neorv32_uart_printf("\n- Min granularity: ");
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neorv32_uart_printf("\n- Min granularity: ");
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if (i < 29) {
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if (i < 29) {
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neorv32_uart_printf("%u bytes per region (0x%x)\n", (uint32_t)(1 << (i+1+2)), pmp_test_g);
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neorv32_uart_printf("%u bytes per region\n", (uint32_t)(1 << (i+1+2)));
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}
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}
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else {
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else {
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neorv32_uart_printf("2^%u bytes per region\n", i+1+2);
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neorv32_uart_printf("2^%u bytes per region\n", i+1+2);
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}
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}
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| Line 483... |
Line 483... |
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tmp = (char)(neorv32_cpu_csr_read(CSR_MIMPID) >> (24 - 8*i));
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tmp = (char)(neorv32_cpu_csr_read(CSR_MIMPID) >> (24 - 8*i));
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// serial division
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// serial division
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cnt = 0;
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cnt = 0;
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while (tmp >= 10) {
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while (tmp >= 16) {
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tmp = tmp - 10;
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tmp = tmp - 16;
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cnt++;
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cnt++;
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}
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}
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if (cnt) {
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if (cnt) {
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neorv32_uart_putc('0' + cnt);
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neorv32_uart_putc('0' + cnt);
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