Line 267... |
Line 267... |
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uint32_t tmp;
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uint32_t tmp;
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int i;
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int i;
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char c;
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char c;
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neorv32_uart_printf("\n\n<< Hardware Configuration Overview >>\n");
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neorv32_uart_printf("\n\n<<< Processor Configuration Overview >>>\n");
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// Processor - general stuff
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neorv32_uart_printf("\n=== << General >> ===\n");
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neorv32_uart_printf("Clock: %u Hz\n", SYSINFO_CLK);
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neorv32_uart_printf("User ID: 0x%x\n", SYSINFO_USER_CODE);
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// CPU configuration
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// CPU configuration
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neorv32_uart_printf("\n---- Central Processing Unit ----\n");
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neorv32_uart_printf("\n=== << CPU >> ===\n");
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// ID
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// ID
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neorv32_uart_printf("Hart ID: 0x%x\n", neorv32_cpu_csr_read(CSR_MHARTID));
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neorv32_uart_printf("Hart ID: 0x%x\n", neorv32_cpu_csr_read(CSR_MHARTID));
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neorv32_uart_printf("Vendor ID: 0x%x\n", neorv32_cpu_csr_read(CSR_MVENDORID));
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neorv32_uart_printf("Vendor ID: 0x%x\n", neorv32_cpu_csr_read(CSR_MVENDORID));
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Line 289... |
neorv32_uart_printf("Architecture ID: 0x%x", tmp);
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neorv32_uart_printf("Architecture ID: 0x%x", tmp);
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if (tmp == NEORV32_ARCHID) {
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if (tmp == NEORV32_ARCHID) {
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neorv32_uart_printf(" (NEORV32)");
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neorv32_uart_printf(" (NEORV32)");
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}
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}
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// HW version
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// hardware version
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neorv32_uart_printf("\nImplementation ID: 0x%x (", neorv32_cpu_csr_read(CSR_MIMPID));
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neorv32_uart_printf("\nImplementation ID: 0x%x (", neorv32_cpu_csr_read(CSR_MIMPID));
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neorv32_rte_print_hw_version();
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neorv32_rte_print_hw_version();
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neorv32_uart_printf(")\n");
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neorv32_uart_printf(")\n");
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// CPU architecture
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// CPU architecture
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Line 357... |
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// check hardware performance monitors
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// check hardware performance monitors
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neorv32_uart_printf("HPM Counters: %u\n", neorv32_cpu_hpm_get_counters());
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neorv32_uart_printf("HPM Counters: %u\n", neorv32_cpu_hpm_get_counters());
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// Misc - system
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neorv32_uart_printf("\n\n---- Processor - General ----\n");
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neorv32_uart_printf("Clock: %u Hz\n", SYSINFO_CLK);
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neorv32_uart_printf("User ID: 0x%x\n", SYSINFO_USER_CODE);
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// Memory configuration
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// Memory configuration
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neorv32_uart_printf("\n---- Processor - Memory Configuration ----\n");
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neorv32_uart_printf("\n=== << Memory Configuration >> ===\n");
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neorv32_uart_printf("Instr. base address: 0x%x\n", SYSINFO_ISPACE_BASE);
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neorv32_uart_printf("Instr. base address: 0x%x\n", SYSINFO_ISPACE_BASE);
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neorv32_uart_printf("Internal IMEM: ");
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neorv32_uart_printf("Internal IMEM: ");
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__neorv32_rte_print_true_false(SYSINFO_FEATURES & (1 << SYSINFO_FEATURES_MEM_INT_IMEM));
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__neorv32_rte_print_true_false(SYSINFO_FEATURES & (1 << SYSINFO_FEATURES_MEM_INT_IMEM));
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neorv32_uart_printf("IMEM size: %u bytes\n", SYSINFO_IMEM_SIZE);
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neorv32_uart_printf("IMEM size: %u bytes\n", SYSINFO_IMEM_SIZE);
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Line 422... |
else {
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else {
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neorv32_uart_printf("little\n");
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neorv32_uart_printf("little\n");
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}
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}
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// peripherals
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// peripherals
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neorv32_uart_printf("\n\n---- Processor - Peripherals ----\n");
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neorv32_uart_printf("\n=== << Peripherals >> ===\n");
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tmp = SYSINFO_FEATURES;
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tmp = SYSINFO_FEATURES;
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neorv32_uart_printf("GPIO - ");
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neorv32_uart_printf("GPIO - ");
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__neorv32_rte_print_true_false(tmp & (1 << SYSINFO_FEATURES_IO_GPIO));
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__neorv32_rte_print_true_false(tmp & (1 << SYSINFO_FEATURES_IO_GPIO));
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Line 452... |
Line 452... |
neorv32_uart_printf("TRNG - ");
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neorv32_uart_printf("TRNG - ");
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__neorv32_rte_print_true_false(tmp & (1 << SYSINFO_FEATURES_IO_TRNG));
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__neorv32_rte_print_true_false(tmp & (1 << SYSINFO_FEATURES_IO_TRNG));
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neorv32_uart_printf("CFS - ");
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neorv32_uart_printf("CFS - ");
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__neorv32_rte_print_true_false(tmp & (1 << SYSINFO_FEATURES_IO_CFS));
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__neorv32_rte_print_true_false(tmp & (1 << SYSINFO_FEATURES_IO_CFS));
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neorv32_uart_printf("NCO - ");
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__neorv32_rte_print_true_false(tmp & (1 << SYSINFO_FEATURES_IO_NCO));
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}
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}
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/**********************************************************************//**
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/**********************************************************************//**
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* NEORV32 runtime environment: Private function to print true or false.
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* NEORV32 runtime environment: Private function to print true or false.
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