| Line 275... |
Line 275... |
// Processor - general stuff
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// Processor - general stuff
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neorv32_uart_printf("\n=== << General >> ===\n");
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neorv32_uart_printf("\n=== << General >> ===\n");
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neorv32_uart_printf("Clock: %u Hz\n", SYSINFO_CLK);
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neorv32_uart_printf("Clock: %u Hz\n", SYSINFO_CLK);
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neorv32_uart_printf("User ID: 0x%x\n", SYSINFO_USER_CODE);
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neorv32_uart_printf("User ID: 0x%x\n", SYSINFO_USER_CODE);
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neorv32_uart_printf("Full HW reset: "); __neorv32_rte_print_true_false(SYSINFO_FEATURES & (1 << SYSINFO_FEATURES_HW_RESET));
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neorv32_uart_printf("Full HW reset: "); __neorv32_rte_print_true_false(SYSINFO_FEATURES & (1 << SYSINFO_FEATURES_HW_RESET));
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neorv32_uart_printf("On-chip debug: "); __neorv32_rte_print_true_false(SYSINFO_FEATURES & (1 << SYSINFO_FEATURES_OCD));
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// CPU configuration
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// CPU configuration
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neorv32_uart_printf("\n=== << CPU >> ===\n");
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neorv32_uart_printf("\n=== << CPU >> ===\n");
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| Line 358... |
Line 359... |
neorv32_uart_printf("Zxnocnt(!) ");
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neorv32_uart_printf("Zxnocnt(!) ");
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}
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}
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if (tmp & (1<<CSR_MZEXT_ZXSCNT)) {
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if (tmp & (1<<CSR_MZEXT_ZXSCNT)) {
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neorv32_uart_printf("Zxscnt(!) ");
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neorv32_uart_printf("Zxscnt(!) ");
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}
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}
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if (tmp & (1<<CSR_MZEXT_DEBUGMODE)) {
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neorv32_uart_printf("Debug-Mode ");
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}
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// check physical memory protection
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// check physical memory protection
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neorv32_uart_printf("\nPMP: ");
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neorv32_uart_printf("\nPMP: ");
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uint32_t pmp_num_regions = neorv32_cpu_pmp_get_num_regions();
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uint32_t pmp_num_regions = neorv32_cpu_pmp_get_num_regions();
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if (pmp_num_regions != 0) {
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if (pmp_num_regions != 0) {
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