| Line 294... |
Line 294... |
}
|
}
|
|
|
// hardware version
|
// hardware version
|
neorv32_uart_printf("\nImplementation ID: 0x%x (", neorv32_cpu_csr_read(CSR_MIMPID));
|
neorv32_uart_printf("\nImplementation ID: 0x%x (", neorv32_cpu_csr_read(CSR_MIMPID));
|
neorv32_rte_print_hw_version();
|
neorv32_rte_print_hw_version();
|
neorv32_uart_printf(")\n");
|
neorv32_uart_putc(')');
|
|
|
// CPU architecture
|
// CPU architecture and endianness
|
neorv32_uart_printf("Architecture: ");
|
neorv32_uart_printf("\nArchitecture: ");
|
tmp = neorv32_cpu_csr_read(CSR_MISA);
|
tmp = neorv32_cpu_csr_read(CSR_MISA);
|
tmp = (tmp >> 30) & 0x03;
|
tmp = (tmp >> 30) & 0x03;
|
if (tmp == 0) {
|
|
neorv32_uart_printf("unknown");
|
|
}
|
|
if (tmp == 1) {
|
if (tmp == 1) {
|
neorv32_uart_printf("rv32");
|
neorv32_uart_printf("rv32-little");
|
}
|
|
if (tmp == 2) {
|
|
neorv32_uart_printf("rv64");
|
|
}
|
|
if (tmp == 3) {
|
|
neorv32_uart_printf("rv128");
|
|
}
|
|
|
|
// CPU extensions
|
|
neorv32_uart_printf("\nEndianness: ");
|
|
if (neorv32_cpu_csr_read(CSR_MSTATUSH) & (1<<CSR_MSTATUSH_MBE)) {
|
|
neorv32_uart_printf("big\n");
|
|
}
|
}
|
else {
|
else {
|
neorv32_uart_printf("little\n");
|
neorv32_uart_printf("unknown");
|
}
|
}
|
|
|
// CPU extensions
|
// CPU extensions
|
neorv32_uart_printf("Extensions: ");
|
neorv32_uart_printf("\nExtensions: ");
|
tmp = neorv32_cpu_csr_read(CSR_MISA);
|
tmp = neorv32_cpu_csr_read(CSR_MISA);
|
for (i=0; i<26; i++) {
|
for (i=0; i<26; i++) {
|
if (tmp & (1 << i)) {
|
if (tmp & (1 << i)) {
|
c = (char)('A' + i);
|
c = (char)('A' + i);
|
neorv32_uart_putc(c);
|
neorv32_uart_putc(c);
|
| Line 341... |
Line 326... |
neorv32_uart_printf("Zicsr ");
|
neorv32_uart_printf("Zicsr ");
|
}
|
}
|
if (tmp & (1<<CSR_MZEXT_ZIFENCEI)) {
|
if (tmp & (1<<CSR_MZEXT_ZIFENCEI)) {
|
neorv32_uart_printf("Zifencei ");
|
neorv32_uart_printf("Zifencei ");
|
}
|
}
|
if (tmp & (1<<CSR_MZEXT_ZBB)) {
|
|
neorv32_uart_printf("Zbb ");
|
|
}
|
|
if (tmp & (1<<CSR_MZEXT_ZBS)) {
|
|
neorv32_uart_printf("Zbs ");
|
|
}
|
|
if (tmp & (1<<CSR_MZEXT_ZBA)) {
|
|
neorv32_uart_printf("Zba ");
|
|
}
|
|
if (tmp & (1<<CSR_MZEXT_ZFINX)) {
|
if (tmp & (1<<CSR_MZEXT_ZFINX)) {
|
neorv32_uart_printf("Zfinx ");
|
neorv32_uart_printf("Zfinx ");
|
}
|
}
|
if (tmp & (1<<CSR_MZEXT_ZXNOCNT)) {
|
if (tmp & (1<<CSR_MZEXT_ZXNOCNT)) {
|
neorv32_uart_printf("Zxnocnt(!) ");
|
neorv32_uart_printf("Zxnocnt(!) ");
|
