OpenCores
URL https://opencores.org/ocsvn/neorv32/neorv32/trunk

Subversion Repositories neorv32

[/] [neorv32/] [trunk/] [sw/] [lib/] [source/] [neorv32_uart.c] - Diff between revs 23 and 30

Go to most recent revision | Show entire file | Details | Blame | View Log

Rev 23 Rev 30
Line 69... Line 69...
 
 
 
 
/**********************************************************************//**
/**********************************************************************//**
 * Enable and configure UART.
 * Enable and configure UART.
 *
 *
 
 * @warning The 'UART_SIM_MODE' compiler flag will redirect all UART TX data to the simulation output. Use this for simulations only!
 
 *
 * @param[in] baudrate Targeted BAUD rate (e.g. 9600).
 * @param[in] baudrate Targeted BAUD rate (e.g. 9600).
 * @param[in] rx_irq Enable RX interrupt (data received) when 1.
 * @param[in] rx_irq Enable RX interrupt (data received) when 1.
 * @param[in] tx_irq Enable TX interrupt (transmission done) when 1.
 * @param[in] tx_irq Enable TX interrupt (transmission done) when 1.
 **************************************************************************/
 **************************************************************************/
void neorv32_uart_setup(uint32_t baudrate, uint8_t rx_irq, uint8_t tx_irq) {
void neorv32_uart_setup(uint32_t baudrate, uint8_t rx_irq, uint8_t tx_irq) {
Line 110... Line 112...
  rx_irq_en = rx_irq_en << UART_CT_RX_IRQ;
  rx_irq_en = rx_irq_en << UART_CT_RX_IRQ;
 
 
  uint32_t tx_irq_en = (uint32_t)(tx_irq & 1);
  uint32_t tx_irq_en = (uint32_t)(tx_irq & 1);
  tx_irq_en = tx_irq_en << UART_CT_TX_IRQ;
  tx_irq_en = tx_irq_en << UART_CT_TX_IRQ;
 
 
  UART_CT = prsc | baud | uart_en | rx_irq_en | tx_irq_en;
  /* Enable the UART for SIM mode. */
 
  /* Only use this for simulation! */
 
#ifdef UART_SIM_MODE
 
  #warning UART_SIM_MODE enabled! Sending all UART.TX to text.io simulation output instead of real UART transmitter. Use this for simulations only!
 
  uint32_t sim_mode = 1 << UART_CT_SIM_MODE;
 
#else
 
  uint32_t sim_mode = 0;
 
#endif
 
 
 
  UART_CT = prsc | baud | uart_en | rx_irq_en | tx_irq_en | sim_mode;
}
}
 
 
 
 
/**********************************************************************//**
/**********************************************************************//**
 * Disable UART.
 * Disable UART.
Line 127... Line 138...
 
 
/**********************************************************************//**
/**********************************************************************//**
 * Send single char via UART.
 * Send single char via UART.
 *
 *
 * @note This function is blocking.
 * @note This function is blocking.
 * @warning The 'DEVNULL_UART_OVERRIDE' compiler user flag will forward all UART TX data to the DEVNULL simulation console output.
 
 *
 *
 * @param[in] c Char to be send.
 * @param[in] c Char to be send.
 **************************************************************************/
 **************************************************************************/
void neorv32_uart_putc(char c) {
void neorv32_uart_putc(char c) {
 
 
#ifdef DEVNULL_UART_OVERRIDE
#ifdef UART_SIM_MODE
  #warning UART OVERRIDE! Sending all UART.TX data to DEVNULL simulation output instead of UART transmitter. Use this for simulations only!
  UART_DATA = ((uint32_t)c) << UART_DATA_LSB;
  DEVNULL_DATA = (uint32_t)c;
 
#else
#else
  // wait for previous transfer to finish
  // wait for previous transfer to finish
  while ((UART_CT & (1<<UART_CT_TX_BUSY)) != 0);
  while ((UART_CT & (1<<UART_CT_TX_BUSY)) != 0);
  UART_DATA = ((uint32_t)c) << UART_DATA_LSB;
  UART_DATA = ((uint32_t)c) << UART_DATA_LSB;
#endif
#endif
 
 
}
}
 
 
 
 
/**********************************************************************//**
/**********************************************************************//**
 * Check if UART TX is busy.
 * Check if UART TX is busy.

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.