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[/] [next186/] [trunk/] [Next186_BIU_2T_delayread.v] - Diff between revs 3 and 4

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Rev 3 Rev 4
Line 69... Line 69...
//              - "inc word ptr [3]" requires 7T (2x2T inc M + 1T read + 1T unaligned read + 1T unaligned write)
//              - "inc word ptr [3]" requires 7T (2x2T inc M + 1T read + 1T unaligned read + 1T unaligned write)
//              - "imul ax,bx,234" requires 4T (2x2T imul)
//              - "imul ax,bx,234" requires 4T (2x2T imul)
//              - "loop address != 3(mod 4)" requires 4T (2x1T loop + 2T flush)
//              - "loop address != 3(mod 4)" requires 4T (2x1T loop + 2T flush)
//              - "loop address == 3(mod 4)" requires 5T (2x1T loop + 2T flush + 1T unaligned jump)
//              - "loop address == 3(mod 4)" requires 5T (2x1T loop + 2T flush + 1T unaligned jump)
//              - "call address 0" requires 4T (2x1T call near + 2T flush
//              - "call address 0" requires 4T (2x1T call near + 2T flush
//              - "ret address 0" requires 5T (2x2T ret + 1T read penalty)
//              - "ret address 0" requires 7T (2x2T ret + 1T read penalty + 2T flush)
//
//
//////////////////////////////////////////////////////////////////////////////////
//////////////////////////////////////////////////////////////////////////////////
 
 
`timescale 1ns / 1ps
`timescale 1ns / 1ps
 
 

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