//--------------------------------------------------------------------------------------------------
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//--------------------------------------------------------------------------------------------------
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// Design : nova
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// Design : nova
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// Author(s) : Ke Xu
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// Author(s) : Ke Xu
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// Email : eexuke@yahoo.com
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// Email : eexuke@yahoo.com
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// File : Intra_pred_PE.v
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// File : Intra_pred_PE.v
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// Generated : Sep 19, 2005
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// Generated : Sep 19, 2005
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// Copyright (C) 2008 Ke Xu
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// Copyright (C) 2008 Ke Xu
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//-------------------------------------------------------------------------------------------------
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//-------------------------------------------------------------------------------------------------
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// Description
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// Description
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// Processing Element for Intra prediction,PE0 ~ PE3
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// Processing Element for Intra prediction,PE0 ~ PE3
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//-------------------------------------------------------------------------------------------------
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//-------------------------------------------------------------------------------------------------
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// synopsys translate_off
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// synopsys translate_off
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`include "timescale.v"
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`include "timescale.v"
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// synopsys translate_on
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// synopsys translate_on
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`include "nova_defines.v"
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`include "nova_defines.v"
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module Intra_pred_PE (clk,reset_n,mb_type_general,blk4x4_rec_counter,blk4x4_intra_calculate_counter,
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module Intra_pred_PE (clk,reset_n,mb_type_general,blk4x4_rec_counter,blk4x4_intra_calculate_counter,
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Intra4x4_predmode,Intra16x16_predmode,Intra_chroma_predmode,
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Intra4x4_predmode,Intra16x16_predmode,Intra_chroma_predmode,
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blkAddrA_availability,blkAddrB_availability,mbAddrA_availability,mbAddrB_availability,
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blkAddrA_availability,blkAddrB_availability,mbAddrA_availability,mbAddrB_availability,
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Intra_mbAddrA_window0,Intra_mbAddrA_window1,Intra_mbAddrA_window2,Intra_mbAddrA_window3,
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Intra_mbAddrA_window0,Intra_mbAddrA_window1,Intra_mbAddrA_window2,Intra_mbAddrA_window3,
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Intra_mbAddrB_window0,Intra_mbAddrB_window1,Intra_mbAddrB_window2,Intra_mbAddrB_window3,
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Intra_mbAddrB_window0,Intra_mbAddrB_window1,Intra_mbAddrB_window2,Intra_mbAddrB_window3,
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Intra_mbAddrC_window0,Intra_mbAddrC_window1,Intra_mbAddrC_window2,Intra_mbAddrC_window3,
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Intra_mbAddrC_window0,Intra_mbAddrC_window1,Intra_mbAddrC_window2,Intra_mbAddrC_window3,
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Intra_mbAddrD_window,
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Intra_mbAddrD_window,
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Intra_mbAddrA_reg0, Intra_mbAddrA_reg1, Intra_mbAddrA_reg2, Intra_mbAddrA_reg3,
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Intra_mbAddrA_reg0, Intra_mbAddrA_reg1, Intra_mbAddrA_reg2, Intra_mbAddrA_reg3,
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Intra_mbAddrA_reg4, Intra_mbAddrA_reg5, Intra_mbAddrA_reg6, Intra_mbAddrA_reg7,
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Intra_mbAddrA_reg4, Intra_mbAddrA_reg5, Intra_mbAddrA_reg6, Intra_mbAddrA_reg7,
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Intra_mbAddrA_reg8, Intra_mbAddrA_reg9, Intra_mbAddrA_reg10,Intra_mbAddrA_reg11,
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Intra_mbAddrA_reg8, Intra_mbAddrA_reg9, Intra_mbAddrA_reg10,Intra_mbAddrA_reg11,
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Intra_mbAddrA_reg12,Intra_mbAddrA_reg13,Intra_mbAddrA_reg14,Intra_mbAddrA_reg15,
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Intra_mbAddrA_reg12,Intra_mbAddrA_reg13,Intra_mbAddrA_reg14,Intra_mbAddrA_reg15,
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Intra_mbAddrB_reg0, Intra_mbAddrB_reg1, Intra_mbAddrB_reg2, Intra_mbAddrB_reg3,
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Intra_mbAddrB_reg0, Intra_mbAddrB_reg1, Intra_mbAddrB_reg2, Intra_mbAddrB_reg3,
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Intra_mbAddrB_reg4, Intra_mbAddrB_reg5, Intra_mbAddrB_reg6, Intra_mbAddrB_reg7,
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Intra_mbAddrB_reg4, Intra_mbAddrB_reg5, Intra_mbAddrB_reg6, Intra_mbAddrB_reg7,
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Intra_mbAddrB_reg8, Intra_mbAddrB_reg9, Intra_mbAddrB_reg10,Intra_mbAddrB_reg11,
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Intra_mbAddrB_reg8, Intra_mbAddrB_reg9, Intra_mbAddrB_reg10,Intra_mbAddrB_reg11,
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Intra_mbAddrB_reg12,Intra_mbAddrB_reg13,Intra_mbAddrB_reg14,Intra_mbAddrB_reg15,
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Intra_mbAddrB_reg12,Intra_mbAddrB_reg13,Intra_mbAddrB_reg14,Intra_mbAddrB_reg15,
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blk4x4_pred_output0, blk4x4_pred_output1, blk4x4_pred_output2,
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blk4x4_pred_output0, blk4x4_pred_output1, blk4x4_pred_output2,
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blk4x4_pred_output4, blk4x4_pred_output5, blk4x4_pred_output6,
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blk4x4_pred_output4, blk4x4_pred_output5, blk4x4_pred_output6,
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blk4x4_pred_output8, blk4x4_pred_output9, blk4x4_pred_output10,
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blk4x4_pred_output8, blk4x4_pred_output9, blk4x4_pred_output10,
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blk4x4_pred_output12,blk4x4_pred_output13,blk4x4_pred_output14,
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blk4x4_pred_output12,blk4x4_pred_output13,blk4x4_pred_output14,
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seed,b,c,
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seed,b,c,
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PE0_out,PE1_out,PE2_out,PE3_out,PE0_sum_out,PE3_sum_out);
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PE0_out,PE1_out,PE2_out,PE3_out,PE0_sum_out,PE3_sum_out);
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input clk,reset_n;
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input clk,reset_n;
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input [3:0] mb_type_general;
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input [3:0] mb_type_general;
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input [4:0] blk4x4_rec_counter;
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input [4:0] blk4x4_rec_counter;
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input [2:0] blk4x4_intra_calculate_counter;
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input [2:0] blk4x4_intra_calculate_counter;
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input [3:0] Intra4x4_predmode;
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input [3:0] Intra4x4_predmode;
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input [1:0] Intra16x16_predmode;
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input [1:0] Intra16x16_predmode;
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input [1:0] Intra_chroma_predmode;
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input [1:0] Intra_chroma_predmode;
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input blkAddrA_availability;
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input blkAddrA_availability;
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input blkAddrB_availability;
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input blkAddrB_availability;
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input mbAddrA_availability;
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input mbAddrA_availability;
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input mbAddrB_availability;
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input mbAddrB_availability;
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input [15:0] Intra_mbAddrA_window0,Intra_mbAddrA_window1,Intra_mbAddrA_window2,Intra_mbAddrA_window3;
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input [15:0] Intra_mbAddrA_window0,Intra_mbAddrA_window1,Intra_mbAddrA_window2,Intra_mbAddrA_window3;
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input [15:0] Intra_mbAddrB_window0,Intra_mbAddrB_window1,Intra_mbAddrB_window2,Intra_mbAddrB_window3;
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input [15:0] Intra_mbAddrB_window0,Intra_mbAddrB_window1,Intra_mbAddrB_window2,Intra_mbAddrB_window3;
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input [15:0] Intra_mbAddrC_window0,Intra_mbAddrC_window1,Intra_mbAddrC_window2,Intra_mbAddrC_window3;
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input [15:0] Intra_mbAddrC_window0,Intra_mbAddrC_window1,Intra_mbAddrC_window2,Intra_mbAddrC_window3;
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input [15:0] Intra_mbAddrD_window;
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input [15:0] Intra_mbAddrD_window;
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input [15:0] Intra_mbAddrA_reg0, Intra_mbAddrA_reg1, Intra_mbAddrA_reg2, Intra_mbAddrA_reg3;
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input [15:0] Intra_mbAddrA_reg0, Intra_mbAddrA_reg1, Intra_mbAddrA_reg2, Intra_mbAddrA_reg3;
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input [15:0] Intra_mbAddrA_reg4, Intra_mbAddrA_reg5, Intra_mbAddrA_reg6, Intra_mbAddrA_reg7;
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input [15:0] Intra_mbAddrA_reg4, Intra_mbAddrA_reg5, Intra_mbAddrA_reg6, Intra_mbAddrA_reg7;
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input [15:0] Intra_mbAddrA_reg8, Intra_mbAddrA_reg9, Intra_mbAddrA_reg10,Intra_mbAddrA_reg11;
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input [15:0] Intra_mbAddrA_reg8, Intra_mbAddrA_reg9, Intra_mbAddrA_reg10,Intra_mbAddrA_reg11;
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input [15:0] Intra_mbAddrA_reg12,Intra_mbAddrA_reg13,Intra_mbAddrA_reg14,Intra_mbAddrA_reg15;
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input [15:0] Intra_mbAddrA_reg12,Intra_mbAddrA_reg13,Intra_mbAddrA_reg14,Intra_mbAddrA_reg15;
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input [15:0] Intra_mbAddrB_reg0, Intra_mbAddrB_reg1, Intra_mbAddrB_reg2, Intra_mbAddrB_reg3;
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input [15:0] Intra_mbAddrB_reg0, Intra_mbAddrB_reg1, Intra_mbAddrB_reg2, Intra_mbAddrB_reg3;
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input [15:0] Intra_mbAddrB_reg4, Intra_mbAddrB_reg5, Intra_mbAddrB_reg6, Intra_mbAddrB_reg7;
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input [15:0] Intra_mbAddrB_reg4, Intra_mbAddrB_reg5, Intra_mbAddrB_reg6, Intra_mbAddrB_reg7;
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input [15:0] Intra_mbAddrB_reg8, Intra_mbAddrB_reg9, Intra_mbAddrB_reg10,Intra_mbAddrB_reg11;
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input [15:0] Intra_mbAddrB_reg8, Intra_mbAddrB_reg9, Intra_mbAddrB_reg10,Intra_mbAddrB_reg11;
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input [15:0] Intra_mbAddrB_reg12,Intra_mbAddrB_reg13,Intra_mbAddrB_reg14,Intra_mbAddrB_reg15;
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input [15:0] Intra_mbAddrB_reg12,Intra_mbAddrB_reg13,Intra_mbAddrB_reg14,Intra_mbAddrB_reg15;
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input [15:0] blk4x4_pred_output0, blk4x4_pred_output1, blk4x4_pred_output2;
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input [15:0] blk4x4_pred_output0, blk4x4_pred_output1, blk4x4_pred_output2;
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input [15:0] blk4x4_pred_output4, blk4x4_pred_output5, blk4x4_pred_output6;
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input [15:0] blk4x4_pred_output4, blk4x4_pred_output5, blk4x4_pred_output6;
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input [15:0] blk4x4_pred_output8, blk4x4_pred_output9, blk4x4_pred_output10;
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input [15:0] blk4x4_pred_output8, blk4x4_pred_output9, blk4x4_pred_output10;
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input [15:0] blk4x4_pred_output12,blk4x4_pred_output13,blk4x4_pred_output14;
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input [15:0] blk4x4_pred_output12,blk4x4_pred_output13,blk4x4_pred_output14;
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input [15:0] seed;
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input [15:0] seed;
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input [11:0] b,c;
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input [11:0] b,c;
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output [7:0] PE0_out;
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output [7:0] PE0_out;
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output [7:0] PE1_out;
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output [7:0] PE1_out;
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output [7:0] PE2_out;
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output [7:0] PE2_out;
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output [7:0] PE3_out;
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output [7:0] PE3_out;
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output [15:0] PE0_sum_out; //for store as 2nd-level seed
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output [15:0] PE0_sum_out; //for store as 2nd-level seed
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output [15:0] PE3_sum_out; //for store as 2nd-level seed
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output [15:0] PE3_sum_out; //for store as 2nd-level seed
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reg [15:0] PE0_in0,PE0_in1,PE0_in2,PE0_in3;
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reg [15:0] PE0_in0,PE0_in1,PE0_in2,PE0_in3;
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reg PE0_IsShift;
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reg PE0_IsShift;
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reg PE0_IsStore;
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reg PE0_IsStore;
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reg PE0_IsClip;
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reg PE0_IsClip;
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reg PE0_full_bypass;
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reg PE0_full_bypass;
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reg [4:0] PE0_round_value;
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reg [4:0] PE0_round_value;
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reg [2:0] PE0_shift_len;
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reg [2:0] PE0_shift_len;
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reg [15:0] PE1_in0,PE1_in1,PE1_in2,PE1_in3;
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reg [15:0] PE1_in0,PE1_in1,PE1_in2,PE1_in3;
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reg PE1_IsShift;
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reg PE1_IsShift;
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reg PE1_IsStore;
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reg PE1_IsStore;
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reg PE1_IsClip;
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reg PE1_IsClip;
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reg PE1_full_bypass;
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reg PE1_full_bypass;
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reg [4:0] PE1_round_value;
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reg [4:0] PE1_round_value;
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reg [2:0] PE1_shift_len;
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reg [2:0] PE1_shift_len;
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reg [15:0] PE2_in0,PE2_in1,PE2_in2,PE2_in3;
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reg [15:0] PE2_in0,PE2_in1,PE2_in2,PE2_in3;
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reg PE2_IsShift;
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reg PE2_IsShift;
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reg PE2_IsStore;
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reg PE2_IsStore;
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reg PE2_IsClip;
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reg PE2_IsClip;
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reg PE2_full_bypass;
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reg PE2_full_bypass;
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reg [4:0] PE2_round_value;
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reg [4:0] PE2_round_value;
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reg [2:0] PE2_shift_len;
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reg [2:0] PE2_shift_len;
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reg [15:0] PE3_in0,PE3_in1,PE3_in2,PE3_in3;
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reg [15:0] PE3_in0,PE3_in1,PE3_in2,PE3_in3;
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reg PE3_IsShift;
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reg PE3_IsShift;
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reg PE3_IsStore;
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reg PE3_IsStore;
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reg PE3_IsClip;
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reg PE3_IsClip;
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reg PE3_full_bypass;
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reg PE3_full_bypass;
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reg [4:0] PE3_round_value;
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reg [4:0] PE3_round_value;
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reg [2:0] PE3_shift_len;
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reg [2:0] PE3_shift_len;
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wire [15:0] PE0_out_reg;
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wire [15:0] PE0_out_reg;
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wire [15:0] PE1_out_reg;
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wire [15:0] PE1_out_reg;
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wire [15:0] PE2_out_reg;
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wire [15:0] PE2_out_reg;
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wire [15:0] PE3_out_reg;
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wire [15:0] PE3_out_reg;
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wire [15:0] PE0_sum_out;
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wire [15:0] PE0_sum_out;
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wire [15:0] PE1_sum_out;
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wire [15:0] PE1_sum_out;
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wire [15:0] PE2_sum_out;
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wire [15:0] PE2_sum_out;
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wire [15:0] PE3_sum_out;
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wire [15:0] PE3_sum_out;
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wire [15:0] b_ext,c_ext;
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wire [15:0] b_ext,c_ext;
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assign b_ext = (b[11] == 1'b1)? {4'b1111,b}:{4'b0000,b};
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assign b_ext = (b[11] == 1'b1)? {4'b1111,b}:{4'b0000,b};
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assign c_ext = (c[11] == 1'b1)? {4'b1111,c}:{4'b0000,c};
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assign c_ext = (c[11] == 1'b1)? {4'b1111,c}:{4'b0000,c};
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PE PE0 (
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PE PE0 (
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.clk(clk),
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.clk(clk),
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.reset_n(reset_n),
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.reset_n(reset_n),
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.in0(PE0_in0),
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.in0(PE0_in0),
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.in1(PE0_in1),
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.in1(PE0_in1),
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.in2(PE0_in2),
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.in2(PE0_in2),
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.in3(PE0_in3),
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.in3(PE0_in3),
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.IsShift(PE0_IsShift),
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.IsShift(PE0_IsShift),
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.IsStore(PE0_IsStore),
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.IsStore(PE0_IsStore),
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.IsClip(PE0_IsClip),
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.IsClip(PE0_IsClip),
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.full_bypass(PE0_full_bypass),
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.full_bypass(PE0_full_bypass),
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.round_value(PE0_round_value),
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.round_value(PE0_round_value),
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.shift_len(PE0_shift_len),
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.shift_len(PE0_shift_len),
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.PE_out_reg(PE0_out_reg),
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.PE_out_reg(PE0_out_reg),
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.PE_out(PE0_out),
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.PE_out(PE0_out),
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.sum_out(PE0_sum_out)
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.sum_out(PE0_sum_out)
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);
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);
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PE PE1 (
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PE PE1 (
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.clk(clk),
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.clk(clk),
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.reset_n(reset_n),
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.reset_n(reset_n),
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.in0(PE1_in0),
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.in0(PE1_in0),
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.in1(PE1_in1),
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.in1(PE1_in1),
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.in2(PE1_in2),
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.in2(PE1_in2),
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.in3(PE1_in3),
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.in3(PE1_in3),
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.IsShift(PE1_IsShift),
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.IsShift(PE1_IsShift),
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.IsStore(PE1_IsStore),
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.IsStore(PE1_IsStore),
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.IsClip(PE1_IsClip),
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.IsClip(PE1_IsClip),
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.full_bypass(PE1_full_bypass),
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.full_bypass(PE1_full_bypass),
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.round_value(PE1_round_value),
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.round_value(PE1_round_value),
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.shift_len(PE1_shift_len),
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.shift_len(PE1_shift_len),
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.PE_out_reg(PE1_out_reg),
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.PE_out_reg(PE1_out_reg),
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.PE_out(PE1_out),
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.PE_out(PE1_out),
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.sum_out(PE1_sum_out)
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.sum_out(PE1_sum_out)
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);
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);
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PE PE2 (
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PE PE2 (
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.clk(clk),
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.clk(clk),
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.reset_n(reset_n),
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.reset_n(reset_n),
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.in0(PE2_in0),
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.in0(PE2_in0),
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.in1(PE2_in1),
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.in1(PE2_in1),
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.in2(PE2_in2),
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.in2(PE2_in2),
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.in3(PE2_in3),
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.in3(PE2_in3),
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.IsShift(PE2_IsShift),
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.IsShift(PE2_IsShift),
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.IsStore(PE2_IsStore),
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.IsStore(PE2_IsStore),
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.IsClip(PE2_IsClip),
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.IsClip(PE2_IsClip),
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.full_bypass(PE2_full_bypass),
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.full_bypass(PE2_full_bypass),
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.round_value(PE2_round_value),
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.round_value(PE2_round_value),
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.shift_len(PE2_shift_len),
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.shift_len(PE2_shift_len),
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.PE_out_reg(PE2_out_reg),
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.PE_out_reg(PE2_out_reg),
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.PE_out(PE2_out),
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.PE_out(PE2_out),
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.sum_out(PE2_sum_out)
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.sum_out(PE2_sum_out)
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);
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);
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PE PE3 (
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PE PE3 (
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.clk(clk),
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.clk(clk),
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.reset_n(reset_n),
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.reset_n(reset_n),
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.in0(PE3_in0),
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.in0(PE3_in0),
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.in1(PE3_in1),
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.in1(PE3_in1),
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.in2(PE3_in2),
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.in2(PE3_in2),
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.in3(PE3_in3),
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.in3(PE3_in3),
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.IsShift(PE3_IsShift),
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.IsShift(PE3_IsShift),
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.IsStore(PE3_IsStore),
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.IsStore(PE3_IsStore),
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.IsClip(PE3_IsClip),
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.IsClip(PE3_IsClip),
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.full_bypass(PE3_full_bypass),
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.full_bypass(PE3_full_bypass),
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.round_value(PE3_round_value),
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.round_value(PE3_round_value),
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.shift_len(PE3_shift_len),
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.shift_len(PE3_shift_len),
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.PE_out_reg(PE3_out_reg),
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.PE_out_reg(PE3_out_reg),
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.PE_out(PE3_out),
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.PE_out(PE3_out),
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.sum_out(PE3_sum_out)
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.sum_out(PE3_sum_out)
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);
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);
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//----
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//----
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//PE0 |
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//PE0 |
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//----
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//----
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always @ (mb_type_general or blk4x4_rec_counter or blk4x4_intra_calculate_counter
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always @ (mb_type_general or blk4x4_rec_counter or blk4x4_intra_calculate_counter
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or Intra4x4_predmode or Intra16x16_predmode or Intra_chroma_predmode
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or Intra4x4_predmode or Intra16x16_predmode or Intra_chroma_predmode
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or blkAddrA_availability or blkAddrB_availability or mbAddrA_availability or mbAddrB_availability
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or blkAddrA_availability or blkAddrB_availability or mbAddrA_availability or mbAddrB_availability
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or Intra_mbAddrA_window0 or Intra_mbAddrA_window1 or Intra_mbAddrA_window2
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or Intra_mbAddrA_window0 or Intra_mbAddrA_window1 or Intra_mbAddrA_window2
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or Intra_mbAddrB_window0 or Intra_mbAddrB_window1 or Intra_mbAddrB_window2 or Intra_mbAddrB_window3
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or Intra_mbAddrB_window0 or Intra_mbAddrB_window1 or Intra_mbAddrB_window2 or Intra_mbAddrB_window3
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or Intra_mbAddrD_window
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or Intra_mbAddrD_window
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or Intra_mbAddrA_reg0 or Intra_mbAddrA_reg1 or Intra_mbAddrA_reg2 or Intra_mbAddrA_reg3
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or Intra_mbAddrA_reg0 or Intra_mbAddrA_reg1 or Intra_mbAddrA_reg2 or Intra_mbAddrA_reg3
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or Intra_mbAddrB_reg1 or Intra_mbAddrB_reg2 or Intra_mbAddrB_reg3
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or Intra_mbAddrB_reg1 or Intra_mbAddrB_reg2 or Intra_mbAddrB_reg3
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or PE0_out_reg or PE1_out_reg or PE2_out_reg or PE3_out_reg
|
or PE0_out_reg or PE1_out_reg or PE2_out_reg or PE3_out_reg
|
or blk4x4_pred_output4 or blk4x4_pred_output5 or blk4x4_pred_output8
|
or blk4x4_pred_output4 or blk4x4_pred_output5 or blk4x4_pred_output8
|
or blk4x4_pred_output9 or blk4x4_pred_output10 or blk4x4_pred_output12
|
or blk4x4_pred_output9 or blk4x4_pred_output10 or blk4x4_pred_output12
|
or seed or b_ext or c_ext)
|
or seed or b_ext or c_ext)
|
//Intra 4x4
|
//Intra 4x4
|
if (mb_type_general[3:2] == 2'b11 && blk4x4_rec_counter < 16)
|
if (mb_type_general[3:2] == 2'b11 && blk4x4_rec_counter < 16)
|
case (Intra4x4_predmode)
|
case (Intra4x4_predmode)
|
`Intra4x4_Vertical:
|
`Intra4x4_Vertical:
|
begin
|
begin
|
case (blk4x4_intra_calculate_counter)
|
case (blk4x4_intra_calculate_counter)
|
4:PE0_in0 <= Intra_mbAddrB_window0;
|
4:PE0_in0 <= Intra_mbAddrB_window0;
|
3:PE0_in0 <= Intra_mbAddrB_window1;
|
3:PE0_in0 <= Intra_mbAddrB_window1;
|
2:PE0_in0 <= Intra_mbAddrB_window2;
|
2:PE0_in0 <= Intra_mbAddrB_window2;
|
1:PE0_in0 <= Intra_mbAddrB_window3;
|
1:PE0_in0 <= Intra_mbAddrB_window3;
|
default:PE0_in0 <= 0;
|
default:PE0_in0 <= 0;
|
endcase
|
endcase
|
PE0_in1 <= 0; PE0_in2 <= 0; PE0_in3 <= 0;
|
PE0_in1 <= 0; PE0_in2 <= 0; PE0_in3 <= 0;
|
PE0_IsShift <= 0; PE0_IsStore <= 0; PE0_IsClip <= 0;
|
PE0_IsShift <= 0; PE0_IsStore <= 0; PE0_IsClip <= 0;
|
PE0_full_bypass <= 1; PE0_round_value <= 0; PE0_shift_len <= 0;
|
PE0_full_bypass <= 1; PE0_round_value <= 0; PE0_shift_len <= 0;
|
end
|
end
|
`Intra4x4_Horizontal:
|
`Intra4x4_Horizontal:
|
begin
|
begin
|
PE0_in0 <= (blk4x4_intra_calculate_counter != 0)? Intra_mbAddrA_window0:0;
|
PE0_in0 <= (blk4x4_intra_calculate_counter != 0)? Intra_mbAddrA_window0:0;
|
PE0_in1 <= 0; PE0_in2 <= 0; PE0_in3 <= 0;
|
PE0_in1 <= 0; PE0_in2 <= 0; PE0_in3 <= 0;
|
PE0_IsShift <= 0; PE0_IsStore <= 0; PE0_IsClip <= 0;
|
PE0_IsShift <= 0; PE0_IsStore <= 0; PE0_IsClip <= 0;
|
PE0_full_bypass <= 1; PE0_round_value <= 0; PE0_shift_len <= 0;
|
PE0_full_bypass <= 1; PE0_round_value <= 0; PE0_shift_len <= 0;
|
end
|
end
|
`Intra4x4_DC:
|
`Intra4x4_DC:
|
case (blk4x4_intra_calculate_counter)
|
case (blk4x4_intra_calculate_counter)
|
4: //A ~ D
|
4: //A ~ D
|
begin
|
begin
|
if (blkAddrB_availability == 1)
|
if (blkAddrB_availability == 1)
|
begin
|
begin
|
PE0_in0 <= Intra_mbAddrB_window0; PE0_in1 <= Intra_mbAddrB_window1;
|
PE0_in0 <= Intra_mbAddrB_window0; PE0_in1 <= Intra_mbAddrB_window1;
|
PE0_in2 <= Intra_mbAddrB_window2; PE0_in3 <= Intra_mbAddrB_window3;
|
PE0_in2 <= Intra_mbAddrB_window2; PE0_in3 <= Intra_mbAddrB_window3;
|
PE0_IsStore <= 1'b1; PE0_full_bypass <= 1'b0;
|
PE0_IsStore <= 1'b1; PE0_full_bypass <= 1'b0;
|
end
|
end
|
else
|
else
|
begin
|
begin
|
PE0_in0 <= 0; PE0_in1 <= 0; PE0_in2 <= 0; PE0_in3 <= 0;
|
PE0_in0 <= 0; PE0_in1 <= 0; PE0_in2 <= 0; PE0_in3 <= 0;
|
PE0_IsStore <= 1'b0; PE0_full_bypass <= 1'b1;
|
PE0_IsStore <= 1'b0; PE0_full_bypass <= 1'b1;
|
end
|
end
|
PE0_IsShift <= 0; PE0_IsClip <= 0;
|
PE0_IsShift <= 0; PE0_IsClip <= 0;
|
PE0_round_value <= 0; PE0_shift_len <= 0;
|
PE0_round_value <= 0; PE0_shift_len <= 0;
|
end
|
end
|
3:
|
3:
|
begin
|
begin
|
case ({blkAddrB_availability,blkAddrA_availability})
|
case ({blkAddrB_availability,blkAddrA_availability})
|
2'b00:
|
2'b00:
|
begin
|
begin
|
PE0_in0 <= 128; PE0_in1 <= 0;
|
PE0_in0 <= 128; PE0_in1 <= 0;
|
PE0_full_bypass <= 1'b1; PE0_round_value <= 0; PE0_shift_len <= 0;
|
PE0_full_bypass <= 1'b1; PE0_round_value <= 0; PE0_shift_len <= 0;
|
end
|
end
|
2'b01,2'b10:
|
2'b01,2'b10:
|
begin
|
begin
|
PE0_in0 <= (blkAddrB_availability)? PE0_out_reg:0;
|
PE0_in0 <= (blkAddrB_availability)? PE0_out_reg:0;
|
PE0_in1 <= (blkAddrA_availability)? PE1_out_reg:0;
|
PE0_in1 <= (blkAddrA_availability)? PE1_out_reg:0;
|
PE0_full_bypass <= 1'b0; PE0_round_value <= 2; PE0_shift_len <= 2;
|
PE0_full_bypass <= 1'b0; PE0_round_value <= 2; PE0_shift_len <= 2;
|
end
|
end
|
2'b11:
|
2'b11:
|
begin
|
begin
|
PE0_in0 <= PE0_out_reg; PE0_in1 <= PE1_out_reg;
|
PE0_in0 <= PE0_out_reg; PE0_in1 <= PE1_out_reg;
|
PE0_full_bypass <= 1'b0; PE0_round_value <= 4; PE0_shift_len <= 3;
|
PE0_full_bypass <= 1'b0; PE0_round_value <= 4; PE0_shift_len <= 3;
|
end
|
end
|
endcase
|
endcase
|
PE0_in2 <= 0; PE0_in3 <= 0;
|
PE0_in2 <= 0; PE0_in3 <= 0;
|
PE0_IsStore <= 0; PE0_IsShift <= 0; PE0_IsClip <= 0;
|
PE0_IsStore <= 0; PE0_IsShift <= 0; PE0_IsClip <= 0;
|
end
|
end
|
default:
|
default:
|
begin
|
begin
|
PE0_in0 <= 0; PE0_in1 <= 0; PE0_in2 <= 0; PE0_in3 <= 0;
|
PE0_in0 <= 0; PE0_in1 <= 0; PE0_in2 <= 0; PE0_in3 <= 0;
|
PE0_IsShift <= 0; PE0_IsStore <= 0; PE0_IsClip <= 0;
|
PE0_IsShift <= 0; PE0_IsStore <= 0; PE0_IsClip <= 0;
|
PE0_full_bypass <= 1; PE0_round_value <= 0; PE0_shift_len <= 0;
|
PE0_full_bypass <= 1; PE0_round_value <= 0; PE0_shift_len <= 0;
|
end
|
end
|
endcase
|
endcase
|
`Intra4x4_Diagonal_Down_Left:
|
`Intra4x4_Diagonal_Down_Left:
|
begin
|
begin
|
case (blk4x4_intra_calculate_counter)
|
case (blk4x4_intra_calculate_counter)
|
4:PE0_in0 <= Intra_mbAddrB_window0;
|
4:PE0_in0 <= Intra_mbAddrB_window0;
|
3:PE0_in0 <= blk4x4_pred_output4;
|
3:PE0_in0 <= blk4x4_pred_output4;
|
2:PE0_in0 <= blk4x4_pred_output8;
|
2:PE0_in0 <= blk4x4_pred_output8;
|
1:PE0_in0 <= blk4x4_pred_output12;
|
1:PE0_in0 <= blk4x4_pred_output12;
|
default:PE0_in0 <= 0;
|
default:PE0_in0 <= 0;
|
endcase
|
endcase
|
PE0_in1 <= (blk4x4_intra_calculate_counter == 4)? Intra_mbAddrB_window2:0;
|
PE0_in1 <= (blk4x4_intra_calculate_counter == 4)? Intra_mbAddrB_window2:0;
|
PE0_in2 <= (blk4x4_intra_calculate_counter == 4)? Intra_mbAddrB_window1:0;
|
PE0_in2 <= (blk4x4_intra_calculate_counter == 4)? Intra_mbAddrB_window1:0;
|
PE0_in3 <= 0;
|
PE0_in3 <= 0;
|
PE0_IsShift <= (blk4x4_intra_calculate_counter == 4)? 1'b1:1'b0;
|
PE0_IsShift <= (blk4x4_intra_calculate_counter == 4)? 1'b1:1'b0;
|
PE0_IsStore <= 1'b0; PE0_IsClip <= 1'b0;
|
PE0_IsStore <= 1'b0; PE0_IsClip <= 1'b0;
|
PE0_full_bypass <= (blk4x4_intra_calculate_counter == 4)? 1'b0:1'b1;
|
PE0_full_bypass <= (blk4x4_intra_calculate_counter == 4)? 1'b0:1'b1;
|
PE0_round_value <= (blk4x4_intra_calculate_counter == 4)? 5'b00010:5'b0; // +2
|
PE0_round_value <= (blk4x4_intra_calculate_counter == 4)? 5'b00010:5'b0; // +2
|
PE0_shift_len <= (blk4x4_intra_calculate_counter == 4)? 3'b010:3'b0; // >>2
|
PE0_shift_len <= (blk4x4_intra_calculate_counter == 4)? 3'b010:3'b0; // >>2
|
end
|
end
|
`Intra4x4_Diagonal_Down_Right:
|
`Intra4x4_Diagonal_Down_Right:
|
begin
|
begin
|
case (blk4x4_intra_calculate_counter)
|
case (blk4x4_intra_calculate_counter)
|
4:begin PE0_in0 <= Intra_mbAddrB_window0; PE0_in1 <= Intra_mbAddrA_window0;
|
4:begin PE0_in0 <= Intra_mbAddrB_window0; PE0_in1 <= Intra_mbAddrA_window0;
|
PE0_in2 <= Intra_mbAddrD_window; end
|
PE0_in2 <= Intra_mbAddrD_window; end
|
3:begin PE0_in0 <= Intra_mbAddrD_window; PE0_in1 <= Intra_mbAddrB_window1;
|
3:begin PE0_in0 <= Intra_mbAddrD_window; PE0_in1 <= Intra_mbAddrB_window1;
|
PE0_in2 <= Intra_mbAddrB_window0; end
|
PE0_in2 <= Intra_mbAddrB_window0; end
|
2:begin PE0_in0 <= Intra_mbAddrB_window0; PE0_in1 <= Intra_mbAddrB_window2;
|
2:begin PE0_in0 <= Intra_mbAddrB_window0; PE0_in1 <= Intra_mbAddrB_window2;
|
PE0_in2 <= Intra_mbAddrB_window1; end
|
PE0_in2 <= Intra_mbAddrB_window1; end
|
1:begin PE0_in0 <= Intra_mbAddrB_window1; PE0_in1 <= Intra_mbAddrB_window3;
|
1:begin PE0_in0 <= Intra_mbAddrB_window1; PE0_in1 <= Intra_mbAddrB_window3;
|
PE0_in2 <= Intra_mbAddrB_window2; end
|
PE0_in2 <= Intra_mbAddrB_window2; end
|
default:begin PE0_in0 <= 0;PE0_in1 <= 0;PE0_in2 <= 0; end
|
default:begin PE0_in0 <= 0;PE0_in1 <= 0;PE0_in2 <= 0; end
|
endcase
|
endcase
|
PE0_in3 <= 0;
|
PE0_in3 <= 0;
|
PE0_IsShift <= (blk4x4_intra_calculate_counter == 0)? 1'b0:1'b1;
|
PE0_IsShift <= (blk4x4_intra_calculate_counter == 0)? 1'b0:1'b1;
|
PE0_IsStore <= 1'b0; PE0_IsClip <= 1'b0; PE0_full_bypass <= 1'b0;
|
PE0_IsStore <= 1'b0; PE0_IsClip <= 1'b0; PE0_full_bypass <= 1'b0;
|
PE0_round_value <= (blk4x4_intra_calculate_counter == 0)? 5'b0:5'b00010; // +2
|
PE0_round_value <= (blk4x4_intra_calculate_counter == 0)? 5'b0:5'b00010; // +2
|
PE0_shift_len <= (blk4x4_intra_calculate_counter == 0)? 3'b0:3'b010; // >>2
|
PE0_shift_len <= (blk4x4_intra_calculate_counter == 0)? 3'b0:3'b010; // >>2
|
end
|
end
|
`Intra4x4_Vertical_Right:
|
`Intra4x4_Vertical_Right:
|
begin
|
begin
|
case (blk4x4_intra_calculate_counter)
|
case (blk4x4_intra_calculate_counter)
|
4:begin PE0_in0 <= Intra_mbAddrB_window0;PE0_in1 <= Intra_mbAddrD_window; end
|
4:begin PE0_in0 <= Intra_mbAddrB_window0;PE0_in1 <= Intra_mbAddrD_window; end
|
3:begin PE0_in0 <= Intra_mbAddrB_window0;PE0_in1 <= Intra_mbAddrB_window1;end
|
3:begin PE0_in0 <= Intra_mbAddrB_window0;PE0_in1 <= Intra_mbAddrB_window1;end
|
2:begin PE0_in0 <= Intra_mbAddrB_window2;PE0_in1 <= Intra_mbAddrB_window1;end
|
2:begin PE0_in0 <= Intra_mbAddrB_window2;PE0_in1 <= Intra_mbAddrB_window1;end
|
1:begin PE0_in0 <= Intra_mbAddrB_window2;PE0_in1 <= Intra_mbAddrB_window3;end
|
1:begin PE0_in0 <= Intra_mbAddrB_window2;PE0_in1 <= Intra_mbAddrB_window3;end
|
default:begin PE0_in0 <= 0;PE0_in1 <= 0; end
|
default:begin PE0_in0 <= 0;PE0_in1 <= 0; end
|
endcase
|
endcase
|
PE0_in2 <= 0; PE0_in3 <= 0;
|
PE0_in2 <= 0; PE0_in3 <= 0;
|
PE0_IsShift <= 1'b0;PE0_IsStore <= 1'b0; PE0_IsClip <= 1'b0; PE0_full_bypass <= 1'b0;
|
PE0_IsShift <= 1'b0;PE0_IsStore <= 1'b0; PE0_IsClip <= 1'b0; PE0_full_bypass <= 1'b0;
|
PE0_round_value <= (blk4x4_intra_calculate_counter == 0)? 5'b0:5'b00001; // +1
|
PE0_round_value <= (blk4x4_intra_calculate_counter == 0)? 5'b0:5'b00001; // +1
|
PE0_shift_len <= (blk4x4_intra_calculate_counter == 0)? 3'b0:3'b001; // >>1
|
PE0_shift_len <= (blk4x4_intra_calculate_counter == 0)? 3'b0:3'b001; // >>1
|
end
|
end
|
`Intra4x4_Horizontal_Down:
|
`Intra4x4_Horizontal_Down:
|
begin
|
begin
|
case (blk4x4_intra_calculate_counter)
|
case (blk4x4_intra_calculate_counter)
|
4:begin PE0_in0 <= Intra_mbAddrA_window0;PE0_in1 <= Intra_mbAddrD_window;
|
4:begin PE0_in0 <= Intra_mbAddrA_window0;PE0_in1 <= Intra_mbAddrD_window;
|
PE0_in2 <= 0;
|
PE0_in2 <= 0;
|
PE0_round_value <= 5'b00001; PE0_shift_len <= 3'b001;end
|
PE0_round_value <= 5'b00001; PE0_shift_len <= 3'b001;end
|
3:begin PE0_in0 <= Intra_mbAddrA_window0;PE0_in1 <= Intra_mbAddrB_window0;
|
3:begin PE0_in0 <= Intra_mbAddrA_window0;PE0_in1 <= Intra_mbAddrB_window0;
|
PE0_in2 <= Intra_mbAddrD_window;
|
PE0_in2 <= Intra_mbAddrD_window;
|
PE0_round_value <= 5'b00010; PE0_shift_len <= 3'b010;end
|
PE0_round_value <= 5'b00010; PE0_shift_len <= 3'b010;end
|
2:begin PE0_in0 <= Intra_mbAddrD_window; PE0_in1 <= Intra_mbAddrB_window1;
|
2:begin PE0_in0 <= Intra_mbAddrD_window; PE0_in1 <= Intra_mbAddrB_window1;
|
PE0_in2 <= Intra_mbAddrB_window0;
|
PE0_in2 <= Intra_mbAddrB_window0;
|
PE0_round_value <= 5'b00010; PE0_shift_len <= 3'b010;end
|
PE0_round_value <= 5'b00010; PE0_shift_len <= 3'b010;end
|
1:begin PE0_in0 <= Intra_mbAddrB_window0;PE0_in1 <= Intra_mbAddrB_window2;
|
1:begin PE0_in0 <= Intra_mbAddrB_window0;PE0_in1 <= Intra_mbAddrB_window2;
|
PE0_in2 <= Intra_mbAddrB_window1;
|
PE0_in2 <= Intra_mbAddrB_window1;
|
PE0_round_value <= 5'b00010; PE0_shift_len <= 3'b010;end
|
PE0_round_value <= 5'b00010; PE0_shift_len <= 3'b010;end
|
default:begin PE0_in0 <= 0;PE0_in1 <= 0;PE0_in2 <= 0;
|
default:begin PE0_in0 <= 0;PE0_in1 <= 0;PE0_in2 <= 0;
|
PE0_round_value <= 0;PE0_shift_len <= 0; end
|
PE0_round_value <= 0;PE0_shift_len <= 0; end
|
endcase
|
endcase
|
PE0_in3 <= 0;
|
PE0_in3 <= 0;
|
PE0_IsShift <= (blk4x4_intra_calculate_counter == 3 || blk4x4_intra_calculate_counter == 2
|
PE0_IsShift <= (blk4x4_intra_calculate_counter == 3 || blk4x4_intra_calculate_counter == 2
|
|| blk4x4_intra_calculate_counter == 1)? 1'b1:1'b0;
|
|| blk4x4_intra_calculate_counter == 1)? 1'b1:1'b0;
|
PE0_IsStore <= 1'b0; PE0_IsClip <= 1'b0; PE0_full_bypass <= 1'b0;
|
PE0_IsStore <= 1'b0; PE0_IsClip <= 1'b0; PE0_full_bypass <= 1'b0;
|
end
|
end
|
`Intra4x4_Vertical_Left:
|
`Intra4x4_Vertical_Left:
|
begin
|
begin
|
case (blk4x4_intra_calculate_counter)
|
case (blk4x4_intra_calculate_counter)
|
4:PE0_in0 <= Intra_mbAddrB_window0;
|
4:PE0_in0 <= Intra_mbAddrB_window0;
|
3:PE0_in0 <= blk4x4_pred_output8;
|
3:PE0_in0 <= blk4x4_pred_output8;
|
2:PE0_in0 <= blk4x4_pred_output9;
|
2:PE0_in0 <= blk4x4_pred_output9;
|
1:PE0_in0 <= blk4x4_pred_output10;
|
1:PE0_in0 <= blk4x4_pred_output10;
|
default:PE0_in0 <= 0;
|
default:PE0_in0 <= 0;
|
endcase
|
endcase
|
PE0_in1 <= (blk4x4_intra_calculate_counter == 4)? Intra_mbAddrB_window1:0;
|
PE0_in1 <= (blk4x4_intra_calculate_counter == 4)? Intra_mbAddrB_window1:0;
|
PE0_in2 <= 0; PE0_in3 <= 0;
|
PE0_in2 <= 0; PE0_in3 <= 0;
|
PE0_IsShift <= 1'b0; PE0_IsStore <= 1'b0; PE0_IsClip <= 1'b0;
|
PE0_IsShift <= 1'b0; PE0_IsStore <= 1'b0; PE0_IsClip <= 1'b0;
|
PE0_full_bypass <= (blk4x4_intra_calculate_counter == 4)? 1'b0:1'b1;
|
PE0_full_bypass <= (blk4x4_intra_calculate_counter == 4)? 1'b0:1'b1;
|
PE0_round_value <= (blk4x4_intra_calculate_counter == 4)? 5'b00001:5'b0; // +1
|
PE0_round_value <= (blk4x4_intra_calculate_counter == 4)? 5'b00001:5'b0; // +1
|
PE0_shift_len <= (blk4x4_intra_calculate_counter == 4)? 3'b001:3'b0; // >>1
|
PE0_shift_len <= (blk4x4_intra_calculate_counter == 4)? 3'b001:3'b0; // >>1
|
end
|
end
|
`Intra4x4_Horizontal_Up:
|
`Intra4x4_Horizontal_Up:
|
begin
|
begin
|
case (blk4x4_intra_calculate_counter)
|
case (blk4x4_intra_calculate_counter)
|
4:begin PE0_in0 <= Intra_mbAddrA_window0; PE0_in1 <= Intra_mbAddrA_window1; end
|
4:begin PE0_in0 <= Intra_mbAddrA_window0; PE0_in1 <= Intra_mbAddrA_window1; end
|
3:begin PE0_in0 <= Intra_mbAddrA_window0; PE0_in1 <= Intra_mbAddrA_window2; end
|
3:begin PE0_in0 <= Intra_mbAddrA_window0; PE0_in1 <= Intra_mbAddrA_window2; end
|
2:begin PE0_in0 <= blk4x4_pred_output4; PE0_in1 <= 0; end
|
2:begin PE0_in0 <= blk4x4_pred_output4; PE0_in1 <= 0; end
|
1:begin PE0_in0 <= blk4x4_pred_output5; PE0_in1 <= 0; end
|
1:begin PE0_in0 <= blk4x4_pred_output5; PE0_in1 <= 0; end
|
default:begin PE0_in0 <= 0; PE0_in1 <= 0; end
|
default:begin PE0_in0 <= 0; PE0_in1 <= 0; end
|
endcase
|
endcase
|
PE0_in2 <= (blk4x4_intra_calculate_counter == 3)? Intra_mbAddrA_window1:0;
|
PE0_in2 <= (blk4x4_intra_calculate_counter == 3)? Intra_mbAddrA_window1:0;
|
PE0_in3 <= 0;
|
PE0_in3 <= 0;
|
PE0_IsShift <= (blk4x4_intra_calculate_counter == 3)? 1'b1:1'b0;
|
PE0_IsShift <= (blk4x4_intra_calculate_counter == 3)? 1'b1:1'b0;
|
PE0_IsStore <= 1'b0; PE0_IsClip <= 1'b0;
|
PE0_IsStore <= 1'b0; PE0_IsClip <= 1'b0;
|
PE0_full_bypass <= (blk4x4_intra_calculate_counter == 4 ||
|
PE0_full_bypass <= (blk4x4_intra_calculate_counter == 4 ||
|
blk4x4_intra_calculate_counter == 3)? 1'b0:1'b1;
|
blk4x4_intra_calculate_counter == 3)? 1'b0:1'b1;
|
PE0_round_value <= (blk4x4_intra_calculate_counter == 4)? 5'd1:
|
PE0_round_value <= (blk4x4_intra_calculate_counter == 4)? 5'd1:
|
(blk4x4_intra_calculate_counter == 3)? 5'd2:5'd0;
|
(blk4x4_intra_calculate_counter == 3)? 5'd2:5'd0;
|
PE0_shift_len <= (blk4x4_intra_calculate_counter == 4)? 3'd1:
|
PE0_shift_len <= (blk4x4_intra_calculate_counter == 4)? 3'd1:
|
(blk4x4_intra_calculate_counter == 3)? 3'd2:3'd0;
|
(blk4x4_intra_calculate_counter == 3)? 3'd2:3'd0;
|
end
|
end
|
default:
|
default:
|
begin
|
begin
|
PE0_in0 <= 0; PE0_in1 <= 0; PE0_in2 <= 0; PE0_in3 <= 0;
|
PE0_in0 <= 0; PE0_in1 <= 0; PE0_in2 <= 0; PE0_in3 <= 0;
|
PE0_IsShift <= 0; PE0_IsStore <= 0; PE0_IsClip <= 0;
|
PE0_IsShift <= 0; PE0_IsStore <= 0; PE0_IsClip <= 0;
|
PE0_full_bypass <= 0; PE0_round_value <= 0; PE0_shift_len <= 0;
|
PE0_full_bypass <= 0; PE0_round_value <= 0; PE0_shift_len <= 0;
|
end
|
end
|
endcase
|
endcase
|
//Intra16x16
|
//Intra16x16
|
else if (mb_type_general[3:2] == 2'b10 && blk4x4_rec_counter < 16)
|
else if (mb_type_general[3:2] == 2'b10 && blk4x4_rec_counter < 16)
|
case (Intra16x16_predmode)
|
case (Intra16x16_predmode)
|
`Intra16x16_Vertical:
|
`Intra16x16_Vertical:
|
begin
|
begin
|
case (blk4x4_intra_calculate_counter)
|
case (blk4x4_intra_calculate_counter)
|
4:PE0_in0 <= Intra_mbAddrB_window0;
|
4:PE0_in0 <= Intra_mbAddrB_window0;
|
3:PE0_in0 <= Intra_mbAddrB_window1;
|
3:PE0_in0 <= Intra_mbAddrB_window1;
|
2:PE0_in0 <= Intra_mbAddrB_window2;
|
2:PE0_in0 <= Intra_mbAddrB_window2;
|
1:PE0_in0 <= Intra_mbAddrB_window3;
|
1:PE0_in0 <= Intra_mbAddrB_window3;
|
default:PE0_in0 <= 0;
|
default:PE0_in0 <= 0;
|
endcase
|
endcase
|
PE0_in1 <= 0; PE0_in2 <= 0; PE0_in3 <= 0;
|
PE0_in1 <= 0; PE0_in2 <= 0; PE0_in3 <= 0;
|
PE0_IsShift <= 0; PE0_IsStore <= 0; PE0_IsClip <= 0;
|
PE0_IsShift <= 0; PE0_IsStore <= 0; PE0_IsClip <= 0;
|
PE0_full_bypass <= 1; PE0_round_value <= 0; PE0_shift_len <= 0;
|
PE0_full_bypass <= 1; PE0_round_value <= 0; PE0_shift_len <= 0;
|
end
|
end
|
`Intra16x16_Horizontal:
|
`Intra16x16_Horizontal:
|
begin
|
begin
|
PE0_in0 <= (blk4x4_intra_calculate_counter != 0)? Intra_mbAddrA_window0:0;
|
PE0_in0 <= (blk4x4_intra_calculate_counter != 0)? Intra_mbAddrA_window0:0;
|
PE0_in1 <= 0; PE0_in2 <= 0; PE0_in3 <= 0;
|
PE0_in1 <= 0; PE0_in2 <= 0; PE0_in3 <= 0;
|
PE0_IsShift <= 0; PE0_IsStore <= 0; PE0_IsClip <= 0;
|
PE0_IsShift <= 0; PE0_IsStore <= 0; PE0_IsClip <= 0;
|
PE0_full_bypass <= 1; PE0_round_value <= 0; PE0_shift_len <= 0;
|
PE0_full_bypass <= 1; PE0_round_value <= 0; PE0_shift_len <= 0;
|
end
|
end
|
`Intra16x16_DC:
|
`Intra16x16_DC:
|
if (blk4x4_rec_counter == 0)
|
if (blk4x4_rec_counter == 0)
|
case (blk4x4_intra_calculate_counter)
|
case (blk4x4_intra_calculate_counter)
|
4:begin // A2 + B2 + C2 + D2
|
4:begin // A2 + B2 + C2 + D2
|
PE0_in0 <= (mbAddrA_availability == 0)? 0:Intra_mbAddrA_reg0;
|
PE0_in0 <= (mbAddrA_availability == 0)? 0:Intra_mbAddrA_reg0;
|
PE0_in1 <= (mbAddrA_availability == 0)? 0:Intra_mbAddrA_reg1;
|
PE0_in1 <= (mbAddrA_availability == 0)? 0:Intra_mbAddrA_reg1;
|
PE0_in2 <= (mbAddrA_availability == 0)? 0:Intra_mbAddrA_reg2;
|
PE0_in2 <= (mbAddrA_availability == 0)? 0:Intra_mbAddrA_reg2;
|
PE0_in3 <= (mbAddrA_availability == 0)? 0:Intra_mbAddrA_reg3;
|
PE0_in3 <= (mbAddrA_availability == 0)? 0:Intra_mbAddrA_reg3;
|
PE0_IsShift <= 0; PE0_IsStore <= 1; PE0_IsClip <= 0;
|
PE0_IsShift <= 0; PE0_IsStore <= 1; PE0_IsClip <= 0;
|
PE0_full_bypass <= 0; PE0_round_value <= 0; PE0_shift_len <= 0; end
|
PE0_full_bypass <= 0; PE0_round_value <= 0; PE0_shift_len <= 0; end
|
3:begin // PE0 output + B1 + C1 + D1
|
3:begin // PE0 output + B1 + C1 + D1
|
PE0_in0 <= PE0_out_reg;
|
PE0_in0 <= PE0_out_reg;
|
PE0_in1 <= (mbAddrB_availability == 0)? 0:Intra_mbAddrB_reg1;
|
PE0_in1 <= (mbAddrB_availability == 0)? 0:Intra_mbAddrB_reg1;
|
PE0_in2 <= (mbAddrB_availability == 0)? 0:Intra_mbAddrB_reg2;
|
PE0_in2 <= (mbAddrB_availability == 0)? 0:Intra_mbAddrB_reg2;
|
PE0_in3 <= (mbAddrB_availability == 0)? 0:Intra_mbAddrB_reg3;
|
PE0_in3 <= (mbAddrB_availability == 0)? 0:Intra_mbAddrB_reg3;
|
PE0_IsShift <= 0; PE0_IsStore <= 1; PE0_IsClip <= 0;
|
PE0_IsShift <= 0; PE0_IsStore <= 1; PE0_IsClip <= 0;
|
PE0_full_bypass <= 0; PE0_round_value <= 0; PE0_shift_len <= 0; end
|
PE0_full_bypass <= 0; PE0_round_value <= 0; PE0_shift_len <= 0; end
|
2:begin // PE0 output + PE1 output + PE2 output + PE3 output
|
2:begin // PE0 output + PE1 output + PE2 output + PE3 output
|
PE0_in0 <= PE0_out_reg; PE0_in1 <= PE1_out_reg;
|
PE0_in0 <= PE0_out_reg; PE0_in1 <= PE1_out_reg;
|
PE0_in2 <= PE2_out_reg; PE0_in3 <= PE3_out_reg;
|
PE0_in2 <= PE2_out_reg; PE0_in3 <= PE3_out_reg;
|
PE0_IsShift <= 0; PE0_IsStore <= 1; PE0_IsClip <= 0;
|
PE0_IsShift <= 0; PE0_IsStore <= 1; PE0_IsClip <= 0;
|
PE0_full_bypass <= 0; PE0_round_value <= 0; PE0_shift_len <= 0; end
|
PE0_full_bypass <= 0; PE0_round_value <= 0; PE0_shift_len <= 0; end
|
1:begin // final DC output
|
1:begin // final DC output
|
PE0_in0 <= (!mbAddrA_availability && !mbAddrB_availability)? 16'd128:PE0_out_reg;
|
PE0_in0 <= (!mbAddrA_availability && !mbAddrB_availability)? 16'd128:PE0_out_reg;
|
PE0_in1 <= PE1_out_reg; PE0_in2 <= 0; PE0_in3 <= 0;
|
PE0_in1 <= PE1_out_reg; PE0_in2 <= 0; PE0_in3 <= 0;
|
PE0_IsShift <= 0; PE0_IsStore <= 1; PE0_IsClip <= 0;
|
PE0_IsShift <= 0; PE0_IsStore <= 1; PE0_IsClip <= 0;
|
PE0_full_bypass <= (!mbAddrA_availability && !mbAddrB_availability)? 1'b1 :1'b0;
|
PE0_full_bypass <= (!mbAddrA_availability && !mbAddrB_availability)? 1'b1 :1'b0;
|
PE0_round_value <= ( mbAddrA_availability && mbAddrB_availability)? 5'b10000:5'b01000;
|
PE0_round_value <= ( mbAddrA_availability && mbAddrB_availability)? 5'b10000:5'b01000;
|
PE0_shift_len <= ( mbAddrA_availability && mbAddrB_availability)? 3'b101 :3'b100;
|
PE0_shift_len <= ( mbAddrA_availability && mbAddrB_availability)? 3'b101 :3'b100;
|
end
|
end
|
default:begin
|
default:begin
|
PE0_in0 <= 0; PE0_in1 <= 0; PE0_in2 <= 0; PE0_in3 <= 0;
|
PE0_in0 <= 0; PE0_in1 <= 0; PE0_in2 <= 0; PE0_in3 <= 0;
|
PE0_IsShift <= 0; PE0_IsStore <= 0; PE0_IsClip <= 0;
|
PE0_IsShift <= 0; PE0_IsStore <= 0; PE0_IsClip <= 0;
|
PE0_full_bypass <= 0; PE0_round_value <= 0; PE0_shift_len <= 0; end
|
PE0_full_bypass <= 0; PE0_round_value <= 0; PE0_shift_len <= 0; end
|
endcase
|
endcase
|
else
|
else
|
begin
|
begin
|
PE0_in0 <= 0; PE0_in1 <= 0; PE0_in2 <= 0; PE0_in3 <= 0;
|
PE0_in0 <= 0; PE0_in1 <= 0; PE0_in2 <= 0; PE0_in3 <= 0;
|
PE0_IsShift <= 0; PE0_IsStore <= 0; PE0_IsClip <= 0;
|
PE0_IsShift <= 0; PE0_IsStore <= 0; PE0_IsClip <= 0;
|
PE0_full_bypass <= 0; PE0_round_value <= 0; PE0_shift_len <= 0;
|
PE0_full_bypass <= 0; PE0_round_value <= 0; PE0_shift_len <= 0;
|
end
|
end
|
`Intra16x16_Plane:
|
`Intra16x16_Plane:
|
begin
|
begin
|
if (blk4x4_intra_calculate_counter != 0)
|
if (blk4x4_intra_calculate_counter != 0)
|
//blk0,2,4,6,8,10,12,14,calc counter == 3'b100:PE0_in0 <= seed;
|
//blk0,2,4,6,8,10,12,14,calc counter == 3'b100:PE0_in0 <= seed;
|
//other cases :PE0_in0 <= left pixel output
|
//other cases :PE0_in0 <= left pixel output
|
PE0_in0 <= (blk4x4_intra_calculate_counter == 4 && blk4x4_rec_counter[0] == 1'b0)?
|
PE0_in0 <= (blk4x4_intra_calculate_counter == 4 && blk4x4_rec_counter[0] == 1'b0)?
|
seed:PE0_out_reg;
|
seed:PE0_out_reg;
|
else
|
else
|
PE0_in0 <= 0;
|
PE0_in0 <= 0;
|
//blk0,2,8,10,calc counter == 3'b100:PE0_in1 <= c_ext
|
//blk0,2,8,10,calc counter == 3'b100:PE0_in1 <= c_ext
|
//other cases :PE0_in1 <= b_ext
|
//other cases :PE0_in1 <= b_ext
|
if (blk4x4_intra_calculate_counter != 0)
|
if (blk4x4_intra_calculate_counter != 0)
|
PE0_in1 <= (blk4x4_intra_calculate_counter == 4 && !blk4x4_rec_counter[2] && !blk4x4_rec_counter[0])?
|
PE0_in1 <= (blk4x4_intra_calculate_counter == 4 && !blk4x4_rec_counter[2] && !blk4x4_rec_counter[0])?
|
c_ext:b_ext;
|
c_ext:b_ext;
|
else
|
else
|
PE0_in1 <= 0;
|
PE0_in1 <= 0;
|
PE0_in2 <= 0; PE0_in3 <= 0;
|
PE0_in2 <= 0; PE0_in3 <= 0;
|
PE0_IsShift <= 1'b0;
|
PE0_IsShift <= 1'b0;
|
PE0_IsStore <= (blk4x4_intra_calculate_counter != 0)? 1'b1:1'b0;
|
PE0_IsStore <= (blk4x4_intra_calculate_counter != 0)? 1'b1:1'b0;
|
PE0_IsClip <= (blk4x4_intra_calculate_counter != 0)? 1'b1:1'b0;
|
PE0_IsClip <= (blk4x4_intra_calculate_counter != 0)? 1'b1:1'b0;
|
PE0_full_bypass <= 1'b0;
|
PE0_full_bypass <= 1'b0;
|
PE0_round_value <= (blk4x4_intra_calculate_counter != 0)? 5'd16:5'd0;
|
PE0_round_value <= (blk4x4_intra_calculate_counter != 0)? 5'd16:5'd0;
|
PE0_shift_len <= (blk4x4_intra_calculate_counter != 0)? 3'd5 :3'd0;
|
PE0_shift_len <= (blk4x4_intra_calculate_counter != 0)? 3'd5 :3'd0;
|
end
|
end
|
endcase
|
endcase
|
//Chroma
|
//Chroma
|
else if (mb_type_general[3] == 1'b1 && blk4x4_rec_counter > 15)
|
else if (mb_type_general[3] == 1'b1 && blk4x4_rec_counter > 15)
|
case (Intra_chroma_predmode)
|
case (Intra_chroma_predmode)
|
`Intra_chroma_DC:
|
`Intra_chroma_DC:
|
begin
|
begin
|
case ({mbAddrA_availability,mbAddrB_availability})
|
case ({mbAddrA_availability,mbAddrB_availability})
|
2'b00:PE0_in0 <= (blk4x4_intra_calculate_counter == 3)? 15'd128:15'd0;
|
2'b00:PE0_in0 <= (blk4x4_intra_calculate_counter == 3)? 15'd128:15'd0;
|
2'b01:PE0_in0 <= (blk4x4_intra_calculate_counter == 4)? Intra_mbAddrB_window0:
|
2'b01:PE0_in0 <= (blk4x4_intra_calculate_counter == 4)? Intra_mbAddrB_window0:
|
(blk4x4_intra_calculate_counter == 3)? PE0_out_reg:0;
|
(blk4x4_intra_calculate_counter == 3)? PE0_out_reg:0;
|
2'b10:PE0_in0 <= (blk4x4_intra_calculate_counter == 3)? PE1_out_reg:0;
|
2'b10:PE0_in0 <= (blk4x4_intra_calculate_counter == 3)? PE1_out_reg:0;
|
2'b11:
|
2'b11:
|
if (blk4x4_intra_calculate_counter == 4)
|
if (blk4x4_intra_calculate_counter == 4)
|
PE0_in0 <= (blk4x4_rec_counter == 18 || blk4x4_rec_counter == 22)?
|
PE0_in0 <= (blk4x4_rec_counter == 18 || blk4x4_rec_counter == 22)?
|
0:Intra_mbAddrB_window0;
|
0:Intra_mbAddrB_window0;
|
else if (blk4x4_intra_calculate_counter == 3)
|
else if (blk4x4_intra_calculate_counter == 3)
|
PE0_in0 <= PE0_out_reg;
|
PE0_in0 <= PE0_out_reg;
|
else
|
else
|
PE0_in0 <= 0;
|
PE0_in0 <= 0;
|
endcase
|
endcase
|
case ({mbAddrA_availability,mbAddrB_availability})
|
case ({mbAddrA_availability,mbAddrB_availability})
|
2'b00:PE0_in1 <= 0;
|
2'b00:PE0_in1 <= 0;
|
2'b01:PE0_in1 <= (blk4x4_intra_calculate_counter == 4)? Intra_mbAddrB_window1:0;
|
2'b01:PE0_in1 <= (blk4x4_intra_calculate_counter == 4)? Intra_mbAddrB_window1:0;
|
2'b10:PE0_in1 <= 0;
|
2'b10:PE0_in1 <= 0;
|
2'b11:
|
2'b11:
|
if (blk4x4_intra_calculate_counter == 4)
|
if (blk4x4_intra_calculate_counter == 4)
|
PE0_in1 <= (blk4x4_rec_counter == 18 || blk4x4_rec_counter == 22)?
|
PE0_in1 <= (blk4x4_rec_counter == 18 || blk4x4_rec_counter == 22)?
|
0:Intra_mbAddrB_window1;
|
0:Intra_mbAddrB_window1;
|
else if (blk4x4_intra_calculate_counter == 3)
|
else if (blk4x4_intra_calculate_counter == 3)
|
PE0_in1 <= PE1_out_reg;
|
PE0_in1 <= PE1_out_reg;
|
else
|
else
|
PE0_in1 <= 0;
|
PE0_in1 <= 0;
|
endcase
|
endcase
|
case (mbAddrB_availability)
|
case (mbAddrB_availability)
|
1'b0:begin PE0_in2 <= 0; PE0_in3 <= 0; end
|
1'b0:begin PE0_in2 <= 0; PE0_in3 <= 0; end
|
1'b1:
|
1'b1:
|
begin
|
begin
|
if (blk4x4_intra_calculate_counter == 4)
|
if (blk4x4_intra_calculate_counter == 4)
|
begin
|
begin
|
PE0_in2 <= ((blk4x4_rec_counter == 18 || blk4x4_rec_counter == 22) && mbAddrA_availability)?
|
PE0_in2 <= ((blk4x4_rec_counter == 18 || blk4x4_rec_counter == 22) && mbAddrA_availability)?
|
0:Intra_mbAddrB_window2;
|
0:Intra_mbAddrB_window2;
|
PE0_in3 <= ((blk4x4_rec_counter == 18 || blk4x4_rec_counter == 22) && mbAddrA_availability)?
|
PE0_in3 <= ((blk4x4_rec_counter == 18 || blk4x4_rec_counter == 22) && mbAddrA_availability)?
|
0:Intra_mbAddrB_window3;
|
0:Intra_mbAddrB_window3;
|
end
|
end
|
else
|
else
|
begin PE0_in2 <= 0; PE0_in3 <= 0; end
|
begin PE0_in2 <= 0; PE0_in3 <= 0; end
|
end
|
end
|
endcase
|
endcase
|
PE0_IsShift <= 1'b0;
|
PE0_IsShift <= 1'b0;
|
PE0_IsStore <= (mbAddrB_availability && blk4x4_intra_calculate_counter == 4)? 1'b1:1'b0;
|
PE0_IsStore <= (mbAddrB_availability && blk4x4_intra_calculate_counter == 4)? 1'b1:1'b0;
|
PE0_IsClip <= 1'b0;
|
PE0_IsClip <= 1'b0;
|
PE0_full_bypass <= (!mbAddrA_availability && !mbAddrB_availability &&
|
PE0_full_bypass <= (!mbAddrA_availability && !mbAddrB_availability &&
|
blk4x4_intra_calculate_counter == 3)? 1'b1:1'b0;
|
blk4x4_intra_calculate_counter == 3)? 1'b1:1'b0;
|
case ({mbAddrA_availability,mbAddrB_availability})
|
case ({mbAddrA_availability,mbAddrB_availability})
|
2'b00 :begin PE0_round_value <= 0; PE0_shift_len <= 0; end
|
2'b00 :begin PE0_round_value <= 0; PE0_shift_len <= 0; end
|
2'b01,2'b10 :begin PE0_round_value <= (blk4x4_intra_calculate_counter == 3)? 5'd2:5'd0;
|
2'b01,2'b10 :begin PE0_round_value <= (blk4x4_intra_calculate_counter == 3)? 5'd2:5'd0;
|
PE0_shift_len <= (blk4x4_intra_calculate_counter == 3)? 3'd2:3'd0; end
|
PE0_shift_len <= (blk4x4_intra_calculate_counter == 3)? 3'd2:3'd0; end
|
2'b11:
|
2'b11:
|
begin
|
begin
|
if (blk4x4_intra_calculate_counter == 3)
|
if (blk4x4_intra_calculate_counter == 3)
|
begin
|
begin
|
PE0_round_value <= (blk4x4_rec_counter == 16 || blk4x4_rec_counter == 19 ||
|
PE0_round_value <= (blk4x4_rec_counter == 16 || blk4x4_rec_counter == 19 ||
|
blk4x4_rec_counter == 20 || blk4x4_rec_counter == 23)? 5'd4:5'd2;
|
blk4x4_rec_counter == 20 || blk4x4_rec_counter == 23)? 5'd4:5'd2;
|
PE0_shift_len <= (blk4x4_rec_counter == 16 || blk4x4_rec_counter == 19 ||
|
PE0_shift_len <= (blk4x4_rec_counter == 16 || blk4x4_rec_counter == 19 ||
|
blk4x4_rec_counter == 20 || blk4x4_rec_counter == 23)? 3'd3:3'd2;
|
blk4x4_rec_counter == 20 || blk4x4_rec_counter == 23)? 3'd3:3'd2;
|
end
|
end
|
else
|
else
|
begin PE0_round_value <= 0; PE0_shift_len <= 0; end
|
begin PE0_round_value <= 0; PE0_shift_len <= 0; end
|
end
|
end
|
endcase
|
endcase
|
end
|
end
|
`Intra_chroma_Horizontal: //---horizontal---
|
`Intra_chroma_Horizontal: //---horizontal---
|
begin
|
begin
|
PE0_in0 <= (blk4x4_intra_calculate_counter != 0)? Intra_mbAddrA_window0:0;
|
PE0_in0 <= (blk4x4_intra_calculate_counter != 0)? Intra_mbAddrA_window0:0;
|
PE0_in1 <= 0; PE0_in2 <= 0; PE0_in3 <= 0;
|
PE0_in1 <= 0; PE0_in2 <= 0; PE0_in3 <= 0;
|
PE0_IsShift <= 0; PE0_IsStore <= 0; PE0_IsClip <= 0;
|
PE0_IsShift <= 0; PE0_IsStore <= 0; PE0_IsClip <= 0;
|
PE0_full_bypass <= 1; PE0_round_value <= 0; PE0_shift_len <= 0;
|
PE0_full_bypass <= 1; PE0_round_value <= 0; PE0_shift_len <= 0;
|
end
|
end
|
`Intra_chroma_Vertical: //---vertical---
|
`Intra_chroma_Vertical: //---vertical---
|
begin
|
begin
|
case (blk4x4_intra_calculate_counter)
|
case (blk4x4_intra_calculate_counter)
|
4:PE0_in0 <= Intra_mbAddrB_window0;
|
4:PE0_in0 <= Intra_mbAddrB_window0;
|
3:PE0_in0 <= Intra_mbAddrB_window1;
|
3:PE0_in0 <= Intra_mbAddrB_window1;
|
2:PE0_in0 <= Intra_mbAddrB_window2;
|
2:PE0_in0 <= Intra_mbAddrB_window2;
|
1:PE0_in0 <= Intra_mbAddrB_window3;
|
1:PE0_in0 <= Intra_mbAddrB_window3;
|
default:PE0_in0 <= 0;
|
default:PE0_in0 <= 0;
|
endcase
|
endcase
|
PE0_in1 <= 0; PE0_in2 <= 0; PE0_in3 <= 0;
|
PE0_in1 <= 0; PE0_in2 <= 0; PE0_in3 <= 0;
|
PE0_IsShift <= 0; PE0_IsStore <= 0; PE0_IsClip <= 0;
|
PE0_IsShift <= 0; PE0_IsStore <= 0; PE0_IsClip <= 0;
|
PE0_full_bypass <= 1; PE0_round_value <= 0; PE0_shift_len <= 0;
|
PE0_full_bypass <= 1; PE0_round_value <= 0; PE0_shift_len <= 0;
|
end
|
end
|
`Intra_chroma_Plane: //---plane---
|
`Intra_chroma_Plane: //---plane---
|
begin
|
begin
|
if (blk4x4_intra_calculate_counter != 0)
|
if (blk4x4_intra_calculate_counter != 0)
|
//need seed, blk4x4 = 16 | 18 | 20 | 22
|
//need seed, blk4x4 = 16 | 18 | 20 | 22
|
//do not need seed,blk4x4 = 17 | 19 | 21 | 23
|
//do not need seed,blk4x4 = 17 | 19 | 21 | 23
|
PE0_in0 <= (blk4x4_rec_counter[0] == 1'b0 && blk4x4_intra_calculate_counter == 4)?
|
PE0_in0 <= (blk4x4_rec_counter[0] == 1'b0 && blk4x4_intra_calculate_counter == 4)?
|
seed:PE0_out_reg;
|
seed:PE0_out_reg;
|
else
|
else
|
PE0_in0 <= 0;
|
PE0_in0 <= 0;
|
if (blk4x4_intra_calculate_counter != 0)
|
if (blk4x4_intra_calculate_counter != 0)
|
PE0_in1 <= (blk4x4_rec_counter[0] == 1'b0 && blk4x4_intra_calculate_counter == 4)? c_ext:b_ext;
|
PE0_in1 <= (blk4x4_rec_counter[0] == 1'b0 && blk4x4_intra_calculate_counter == 4)? c_ext:b_ext;
|
else
|
else
|
PE0_in1 <= 0;
|
PE0_in1 <= 0;
|
PE0_in2 <= 0; PE0_in3 <= 0;
|
PE0_in2 <= 0; PE0_in3 <= 0;
|
PE0_IsShift <= 1'b0;
|
PE0_IsShift <= 1'b0;
|
PE0_IsStore <= (blk4x4_intra_calculate_counter != 0)? 1'b1:1'b0;
|
PE0_IsStore <= (blk4x4_intra_calculate_counter != 0)? 1'b1:1'b0;
|
PE0_IsClip <= (blk4x4_intra_calculate_counter != 0)? 1'b1:1'b0;
|
PE0_IsClip <= (blk4x4_intra_calculate_counter != 0)? 1'b1:1'b0;
|
PE0_full_bypass <= 1'b0;
|
PE0_full_bypass <= 1'b0;
|
PE0_round_value <= (blk4x4_intra_calculate_counter != 0)? 5'd16:5'd0;
|
PE0_round_value <= (blk4x4_intra_calculate_counter != 0)? 5'd16:5'd0;
|
PE0_shift_len <= (blk4x4_intra_calculate_counter != 0)? 3'd5 :3'd0;
|
PE0_shift_len <= (blk4x4_intra_calculate_counter != 0)? 3'd5 :3'd0;
|
end
|
end
|
endcase
|
endcase
|
else
|
else
|
begin
|
begin
|
PE0_in0 <= 0; PE0_in1 <= 0; PE0_in2 <= 0; PE0_in3 <= 0;
|
PE0_in0 <= 0; PE0_in1 <= 0; PE0_in2 <= 0; PE0_in3 <= 0;
|
PE0_IsShift <= 0; PE0_IsStore <= 0; PE0_IsClip <= 0;
|
PE0_IsShift <= 0; PE0_IsStore <= 0; PE0_IsClip <= 0;
|
PE0_full_bypass <= 0; PE0_round_value <= 0; PE0_shift_len <= 0;
|
PE0_full_bypass <= 0; PE0_round_value <= 0; PE0_shift_len <= 0;
|
end
|
end
|
//----
|
//----
|
//PE1 |
|
//PE1 |
|
//----
|
//----
|
always @ (mb_type_general or blk4x4_rec_counter or blk4x4_intra_calculate_counter
|
always @ (mb_type_general or blk4x4_rec_counter or blk4x4_intra_calculate_counter
|
or Intra4x4_predmode or Intra16x16_predmode or Intra_chroma_predmode
|
or Intra4x4_predmode or Intra16x16_predmode or Intra_chroma_predmode
|
or blkAddrA_availability or mbAddrA_availability or mbAddrB_availability
|
or blkAddrA_availability or mbAddrA_availability or mbAddrB_availability
|
|
|
or Intra_mbAddrA_window0 or Intra_mbAddrA_window1 or Intra_mbAddrA_window2 or Intra_mbAddrA_window3
|
or Intra_mbAddrA_window0 or Intra_mbAddrA_window1 or Intra_mbAddrA_window2 or Intra_mbAddrA_window3
|
or Intra_mbAddrB_window0 or Intra_mbAddrB_window1 or Intra_mbAddrB_window2 or Intra_mbAddrB_window3
|
or Intra_mbAddrB_window0 or Intra_mbAddrB_window1 or Intra_mbAddrB_window2 or Intra_mbAddrB_window3
|
or Intra_mbAddrD_window
|
or Intra_mbAddrD_window
|
|
|
or Intra_mbAddrA_reg4 or Intra_mbAddrA_reg5 or Intra_mbAddrA_reg6 or Intra_mbAddrA_reg7
|
or Intra_mbAddrA_reg4 or Intra_mbAddrA_reg5 or Intra_mbAddrA_reg6 or Intra_mbAddrA_reg7
|
or Intra_mbAddrB_reg0 or Intra_mbAddrB_reg4 or Intra_mbAddrB_reg5 or Intra_mbAddrB_reg6
|
or Intra_mbAddrB_reg0 or Intra_mbAddrB_reg4 or Intra_mbAddrB_reg5 or Intra_mbAddrB_reg6
|
or Intra_mbAddrB_reg7 or Intra_mbAddrB_reg8 or Intra_mbAddrB_reg12
|
or Intra_mbAddrB_reg7 or Intra_mbAddrB_reg8 or Intra_mbAddrB_reg12
|
|
|
or PE1_out_reg
|
or PE1_out_reg
|
or blk4x4_pred_output0 or blk4x4_pred_output1 or blk4x4_pred_output2
|
or blk4x4_pred_output0 or blk4x4_pred_output1 or blk4x4_pred_output2
|
or blk4x4_pred_output8 or blk4x4_pred_output9 or blk4x4_pred_output12
|
or blk4x4_pred_output8 or blk4x4_pred_output9 or blk4x4_pred_output12
|
or blk4x4_pred_output13 or blk4x4_pred_output14
|
or blk4x4_pred_output13 or blk4x4_pred_output14
|
or seed or b_ext or c_ext)
|
or seed or b_ext or c_ext)
|
//Intra 4x4
|
//Intra 4x4
|
if (mb_type_general[3:2] == 2'b11 && blk4x4_rec_counter < 16)
|
if (mb_type_general[3:2] == 2'b11 && blk4x4_rec_counter < 16)
|
case (Intra4x4_predmode)
|
case (Intra4x4_predmode)
|
`Intra4x4_Vertical: //---Vertical---
|
`Intra4x4_Vertical: //---Vertical---
|
begin
|
begin
|
case (blk4x4_intra_calculate_counter)
|
case (blk4x4_intra_calculate_counter)
|
4:PE1_in0 <= Intra_mbAddrB_window0;
|
4:PE1_in0 <= Intra_mbAddrB_window0;
|
3:PE1_in0 <= Intra_mbAddrB_window1;
|
3:PE1_in0 <= Intra_mbAddrB_window1;
|
2:PE1_in0 <= Intra_mbAddrB_window2;
|
2:PE1_in0 <= Intra_mbAddrB_window2;
|
1:PE1_in0 <= Intra_mbAddrB_window3;
|
1:PE1_in0 <= Intra_mbAddrB_window3;
|
default:PE1_in0 <= 0;
|
default:PE1_in0 <= 0;
|
endcase
|
endcase
|
PE1_in1 <= 0; PE1_in2 <= 0; PE1_in3 <= 0;
|
PE1_in1 <= 0; PE1_in2 <= 0; PE1_in3 <= 0;
|
PE1_IsShift <= 0; PE1_IsStore <= 0; PE1_IsClip <= 0;
|
PE1_IsShift <= 0; PE1_IsStore <= 0; PE1_IsClip <= 0;
|
PE1_full_bypass <= 1; PE1_round_value <= 0; PE1_shift_len <= 0;
|
PE1_full_bypass <= 1; PE1_round_value <= 0; PE1_shift_len <= 0;
|
end
|
end
|
`Intra4x4_Horizontal: //---Horizontal---
|
`Intra4x4_Horizontal: //---Horizontal---
|
begin
|
begin
|
PE1_in0 <= (blk4x4_intra_calculate_counter != 0)? Intra_mbAddrA_window1:0;
|
PE1_in0 <= (blk4x4_intra_calculate_counter != 0)? Intra_mbAddrA_window1:0;
|
PE1_in1 <= 0; PE1_in2 <= 0; PE1_in3 <= 0;
|
PE1_in1 <= 0; PE1_in2 <= 0; PE1_in3 <= 0;
|
PE1_IsShift <= 0; PE1_IsStore <= 0; PE1_IsClip <= 0;
|
PE1_IsShift <= 0; PE1_IsStore <= 0; PE1_IsClip <= 0;
|
PE1_full_bypass <= 1; PE1_round_value <= 0; PE1_shift_len <= 0;
|
PE1_full_bypass <= 1; PE1_round_value <= 0; PE1_shift_len <= 0;
|
end
|
end
|
`Intra4x4_DC: //---DC---
|
`Intra4x4_DC: //---DC---
|
begin
|
begin
|
PE1_in0 <= (blk4x4_intra_calculate_counter == 4 && blkAddrA_availability == 1)?
|
PE1_in0 <= (blk4x4_intra_calculate_counter == 4 && blkAddrA_availability == 1)?
|
Intra_mbAddrA_window0:0;
|
Intra_mbAddrA_window0:0;
|
PE1_in1 <= (blk4x4_intra_calculate_counter == 4 && blkAddrA_availability == 1)?
|
PE1_in1 <= (blk4x4_intra_calculate_counter == 4 && blkAddrA_availability == 1)?
|
Intra_mbAddrA_window1:0;
|
Intra_mbAddrA_window1:0;
|
PE1_in2 <= (blk4x4_intra_calculate_counter == 4 && blkAddrA_availability == 1)?
|
PE1_in2 <= (blk4x4_intra_calculate_counter == 4 && blkAddrA_availability == 1)?
|
Intra_mbAddrA_window2:0;
|
Intra_mbAddrA_window2:0;
|
PE1_in3 <= (blk4x4_intra_calculate_counter == 4 && blkAddrA_availability == 1)?
|
PE1_in3 <= (blk4x4_intra_calculate_counter == 4 && blkAddrA_availability == 1)?
|
Intra_mbAddrA_window3:0;
|
Intra_mbAddrA_window3:0;
|
PE1_IsStore <= (blk4x4_intra_calculate_counter == 4 && blkAddrA_availability == 1)? 1'b1:1'b0;
|
PE1_IsStore <= (blk4x4_intra_calculate_counter == 4 && blkAddrA_availability == 1)? 1'b1:1'b0;
|
PE1_full_bypass <= 1'b0; PE1_IsShift <= 0; PE1_IsClip <= 0;
|
PE1_full_bypass <= 1'b0; PE1_IsShift <= 0; PE1_IsClip <= 0;
|
PE1_round_value <= 0; PE1_shift_len <= 0;
|
PE1_round_value <= 0; PE1_shift_len <= 0;
|
end
|
end
|
`Intra4x4_Diagonal_Down_Left: //---diagonal down-left---
|
`Intra4x4_Diagonal_Down_Left: //---diagonal down-left---
|
begin
|
begin
|
case (blk4x4_intra_calculate_counter)
|
case (blk4x4_intra_calculate_counter)
|
4:PE1_in0 <= Intra_mbAddrB_window1;
|
4:PE1_in0 <= Intra_mbAddrB_window1;
|
3:PE1_in0 <= blk4x4_pred_output8;
|
3:PE1_in0 <= blk4x4_pred_output8;
|
2:PE1_in0 <= blk4x4_pred_output12;
|
2:PE1_in0 <= blk4x4_pred_output12;
|
1:PE1_in0 <= blk4x4_pred_output13;
|
1:PE1_in0 <= blk4x4_pred_output13;
|
default:PE1_in0 <= 0;
|
default:PE1_in0 <= 0;
|
endcase
|
endcase
|
PE1_in1 <= (blk4x4_intra_calculate_counter == 4)? Intra_mbAddrB_window3:0;
|
PE1_in1 <= (blk4x4_intra_calculate_counter == 4)? Intra_mbAddrB_window3:0;
|
PE1_in2 <= (blk4x4_intra_calculate_counter == 4)? Intra_mbAddrB_window2:0;
|
PE1_in2 <= (blk4x4_intra_calculate_counter == 4)? Intra_mbAddrB_window2:0;
|
PE1_in3 <= 0;
|
PE1_in3 <= 0;
|
PE1_IsShift <= (blk4x4_intra_calculate_counter == 4)? 1'b1:1'b0;
|
PE1_IsShift <= (blk4x4_intra_calculate_counter == 4)? 1'b1:1'b0;
|
PE1_IsStore <= 1'b0; PE1_IsClip <= 1'b0;
|
PE1_IsStore <= 1'b0; PE1_IsClip <= 1'b0;
|
PE1_full_bypass <= (blk4x4_intra_calculate_counter == 4)? 1'b0:1'b1;
|
PE1_full_bypass <= (blk4x4_intra_calculate_counter == 4)? 1'b0:1'b1;
|
PE1_round_value <= (blk4x4_intra_calculate_counter == 4)? 5'b00010:5'b0; // +2
|
PE1_round_value <= (blk4x4_intra_calculate_counter == 4)? 5'b00010:5'b0; // +2
|
PE1_shift_len <= (blk4x4_intra_calculate_counter == 4)? 3'b010 :3'b0; // >>2
|
PE1_shift_len <= (blk4x4_intra_calculate_counter == 4)? 3'b010 :3'b0; // >>2
|
end
|
end
|
`Intra4x4_Diagonal_Down_Right: //---diagonal down-right---
|
`Intra4x4_Diagonal_Down_Right: //---diagonal down-right---
|
begin
|
begin
|
case (blk4x4_intra_calculate_counter)
|
case (blk4x4_intra_calculate_counter)
|
4:PE1_in0 <= Intra_mbAddrD_window;
|
4:PE1_in0 <= Intra_mbAddrD_window;
|
3:PE1_in0 <= blk4x4_pred_output0;
|
3:PE1_in0 <= blk4x4_pred_output0;
|
2:PE1_in0 <= blk4x4_pred_output1;
|
2:PE1_in0 <= blk4x4_pred_output1;
|
1:PE1_in0 <= blk4x4_pred_output2;
|
1:PE1_in0 <= blk4x4_pred_output2;
|
default:PE1_in0 <= 0;
|
default:PE1_in0 <= 0;
|
endcase
|
endcase
|
PE1_in1 <= (blk4x4_intra_calculate_counter == 4)? Intra_mbAddrA_window1:0;
|
PE1_in1 <= (blk4x4_intra_calculate_counter == 4)? Intra_mbAddrA_window1:0;
|
PE1_in2 <= (blk4x4_intra_calculate_counter == 4)? Intra_mbAddrA_window0:0;
|
PE1_in2 <= (blk4x4_intra_calculate_counter == 4)? Intra_mbAddrA_window0:0;
|
PE1_in3 <= 0;
|
PE1_in3 <= 0;
|
PE1_IsShift <= (blk4x4_intra_calculate_counter == 0)? 1'b0:1'b1;
|
PE1_IsShift <= (blk4x4_intra_calculate_counter == 0)? 1'b0:1'b1;
|
PE1_IsStore <= 1'b0; PE1_IsClip <= 1'b0;
|
PE1_IsStore <= 1'b0; PE1_IsClip <= 1'b0;
|
PE1_full_bypass <= (blk4x4_intra_calculate_counter == 4)? 1'b0:1'b1;
|
PE1_full_bypass <= (blk4x4_intra_calculate_counter == 4)? 1'b0:1'b1;
|
PE1_round_value <= (blk4x4_intra_calculate_counter == 0)? 5'b0:5'b00010; // +2
|
PE1_round_value <= (blk4x4_intra_calculate_counter == 0)? 5'b0:5'b00010; // +2
|
PE1_shift_len <= (blk4x4_intra_calculate_counter == 0)? 3'b0:3'b010; // >>2
|
PE1_shift_len <= (blk4x4_intra_calculate_counter == 0)? 3'b0:3'b010; // >>2
|
end
|
end
|
`Intra4x4_Vertical_Right: //---vertical right---
|
`Intra4x4_Vertical_Right: //---vertical right---
|
begin
|
begin
|
case (blk4x4_intra_calculate_counter)
|
case (blk4x4_intra_calculate_counter)
|
4:begin PE1_in0 <= Intra_mbAddrB_window0; PE1_in1 <= Intra_mbAddrA_window0;
|
4:begin PE1_in0 <= Intra_mbAddrB_window0; PE1_in1 <= Intra_mbAddrA_window0;
|
PE1_in2 <= Intra_mbAddrD_window; end
|
PE1_in2 <= Intra_mbAddrD_window; end
|
3:begin PE1_in0 <= Intra_mbAddrD_window; PE1_in1 <= Intra_mbAddrB_window1;
|
3:begin PE1_in0 <= Intra_mbAddrD_window; PE1_in1 <= Intra_mbAddrB_window1;
|
PE1_in2 <= Intra_mbAddrB_window0; end
|
PE1_in2 <= Intra_mbAddrB_window0; end
|
2:begin PE1_in0 <= Intra_mbAddrB_window0; PE1_in1 <= Intra_mbAddrB_window2;
|
2:begin PE1_in0 <= Intra_mbAddrB_window0; PE1_in1 <= Intra_mbAddrB_window2;
|
PE1_in2 <= Intra_mbAddrB_window1; end
|
PE1_in2 <= Intra_mbAddrB_window1; end
|
1:begin PE1_in0 <= Intra_mbAddrB_window1; PE1_in1 <= Intra_mbAddrB_window3;
|
1:begin PE1_in0 <= Intra_mbAddrB_window1; PE1_in1 <= Intra_mbAddrB_window3;
|
PE1_in2 <= Intra_mbAddrB_window2; end
|
PE1_in2 <= Intra_mbAddrB_window2; end
|
default:begin PE1_in0 <= 0;PE1_in1 <= 0;PE1_in2 <= 0; end
|
default:begin PE1_in0 <= 0;PE1_in1 <= 0;PE1_in2 <= 0; end
|
endcase
|
endcase
|
PE1_in3 <= 0;
|
PE1_in3 <= 0;
|
PE1_IsShift <= (blk4x4_intra_calculate_counter == 0)? 1'b0:1'b1;
|
PE1_IsShift <= (blk4x4_intra_calculate_counter == 0)? 1'b0:1'b1;
|
PE1_IsStore <= 1'b0; PE1_IsClip <= 1'b0; PE1_full_bypass <= 1'b0;
|
PE1_IsStore <= 1'b0; PE1_IsClip <= 1'b0; PE1_full_bypass <= 1'b0;
|
PE1_round_value <= (blk4x4_intra_calculate_counter == 0)? 5'b0:5'b00010; // +2
|
PE1_round_value <= (blk4x4_intra_calculate_counter == 0)? 5'b0:5'b00010; // +2
|
PE1_shift_len <= (blk4x4_intra_calculate_counter == 0)? 3'b0:3'b010; // >>2
|
PE1_shift_len <= (blk4x4_intra_calculate_counter == 0)? 3'b0:3'b010; // >>2
|
end
|
end
|
`Intra4x4_Horizontal_Down: //---horizontal down---
|
`Intra4x4_Horizontal_Down: //---horizontal down---
|
begin
|
begin
|
case (blk4x4_intra_calculate_counter)
|
case (blk4x4_intra_calculate_counter)
|
4:PE1_in0 <= Intra_mbAddrA_window0;
|
4:PE1_in0 <= Intra_mbAddrA_window0;
|
3:PE1_in0 <= Intra_mbAddrD_window;
|
3:PE1_in0 <= Intra_mbAddrD_window;
|
2:PE1_in0 <= blk4x4_pred_output0;
|
2:PE1_in0 <= blk4x4_pred_output0;
|
1:PE1_in0 <= blk4x4_pred_output1;
|
1:PE1_in0 <= blk4x4_pred_output1;
|
default:PE1_in0 <= 0;
|
default:PE1_in0 <= 0;
|
endcase
|
endcase
|
PE1_in1 <= (blk4x4_intra_calculate_counter == 4 || blk4x4_intra_calculate_counter == 3)?
|
PE1_in1 <= (blk4x4_intra_calculate_counter == 4 || blk4x4_intra_calculate_counter == 3)?
|
Intra_mbAddrA_window1:0;
|
Intra_mbAddrA_window1:0;
|
PE1_in2 <= (blk4x4_intra_calculate_counter == 3)? Intra_mbAddrA_window0:0;
|
PE1_in2 <= (blk4x4_intra_calculate_counter == 3)? Intra_mbAddrA_window0:0;
|
PE1_in3 <= 0;
|
PE1_in3 <= 0;
|
PE1_IsShift <= (blk4x4_intra_calculate_counter == 3)? 1'b1:1'b0;
|
PE1_IsShift <= (blk4x4_intra_calculate_counter == 3)? 1'b1:1'b0;
|
PE1_IsStore <= 1'b0; PE1_IsClip <= 1'b0;
|
PE1_IsStore <= 1'b0; PE1_IsClip <= 1'b0;
|
PE1_full_bypass <= (blk4x4_intra_calculate_counter == 2 ||
|
PE1_full_bypass <= (blk4x4_intra_calculate_counter == 2 ||
|
blk4x4_intra_calculate_counter == 1)? 1'b1:1'b0;
|
blk4x4_intra_calculate_counter == 1)? 1'b1:1'b0;
|
PE1_round_value <= (blk4x4_intra_calculate_counter == 4)? 5'd1:
|
PE1_round_value <= (blk4x4_intra_calculate_counter == 4)? 5'd1:
|
(blk4x4_intra_calculate_counter == 3)? 5'd2:5'd0;
|
(blk4x4_intra_calculate_counter == 3)? 5'd2:5'd0;
|
PE1_shift_len <= (blk4x4_intra_calculate_counter == 4)? 3'd1:
|
PE1_shift_len <= (blk4x4_intra_calculate_counter == 4)? 3'd1:
|
(blk4x4_intra_calculate_counter == 3)? 3'd2:3'd0;
|
(blk4x4_intra_calculate_counter == 3)? 3'd2:3'd0;
|
end
|
end
|
`Intra4x4_Vertical_Left: //---vertical left---
|
`Intra4x4_Vertical_Left: //---vertical left---
|
begin
|
begin
|
case (blk4x4_intra_calculate_counter)
|
case (blk4x4_intra_calculate_counter)
|
4:PE1_in0 <= Intra_mbAddrB_window0;
|
4:PE1_in0 <= Intra_mbAddrB_window0;
|
3:PE1_in0 <= blk4x4_pred_output12;
|
3:PE1_in0 <= blk4x4_pred_output12;
|
2:PE1_in0 <= blk4x4_pred_output13;
|
2:PE1_in0 <= blk4x4_pred_output13;
|
1:PE1_in0 <= blk4x4_pred_output14;
|
1:PE1_in0 <= blk4x4_pred_output14;
|
default:PE1_in0 <= 0;
|
default:PE1_in0 <= 0;
|
endcase
|
endcase
|
PE1_in1 <= (blk4x4_intra_calculate_counter == 4)? Intra_mbAddrB_window2:0;
|
PE1_in1 <= (blk4x4_intra_calculate_counter == 4)? Intra_mbAddrB_window2:0;
|
PE1_in2 <= (blk4x4_intra_calculate_counter == 4)? Intra_mbAddrB_window1:0;
|
PE1_in2 <= (blk4x4_intra_calculate_counter == 4)? Intra_mbAddrB_window1:0;
|
PE1_in3 <= 0;
|
PE1_in3 <= 0;
|
PE1_IsShift <= (blk4x4_intra_calculate_counter == 4)? 1'b1:1'b0;
|
PE1_IsShift <= (blk4x4_intra_calculate_counter == 4)? 1'b1:1'b0;
|
PE1_IsStore <= 1'b0; PE1_IsClip <= 1'b0;
|
PE1_IsStore <= 1'b0; PE1_IsClip <= 1'b0;
|
PE1_full_bypass <= (blk4x4_intra_calculate_counter == 4)? 1'b0:1'b1;
|
PE1_full_bypass <= (blk4x4_intra_calculate_counter == 4)? 1'b0:1'b1;
|
PE1_round_value <= (blk4x4_intra_calculate_counter == 4)? 5'd2:5'd0; // +2
|
PE1_round_value <= (blk4x4_intra_calculate_counter == 4)? 5'd2:5'd0; // +2
|
PE1_shift_len <= (blk4x4_intra_calculate_counter == 4)? 3'd2:3'd0; // >>2
|
PE1_shift_len <= (blk4x4_intra_calculate_counter == 4)? 3'd2:3'd0; // >>2
|
end
|
end
|
`Intra4x4_Horizontal_Up: //---horizontal up---
|
`Intra4x4_Horizontal_Up: //---horizontal up---
|
begin
|
begin
|
case (blk4x4_intra_calculate_counter)
|
case (blk4x4_intra_calculate_counter)
|
4:PE1_in0 <= Intra_mbAddrA_window1;
|
4:PE1_in0 <= Intra_mbAddrA_window1;
|
3:PE1_in0 <= Intra_mbAddrA_window1;
|
3:PE1_in0 <= Intra_mbAddrA_window1;
|
2:PE1_in0 <= blk4x4_pred_output8;
|
2:PE1_in0 <= blk4x4_pred_output8;
|
1:PE1_in0 <= blk4x4_pred_output9;
|
1:PE1_in0 <= blk4x4_pred_output9;
|
default:PE1_in0 <= 0;
|
default:PE1_in0 <= 0;
|
endcase
|
endcase
|
PE1_in1 <= (blk4x4_intra_calculate_counter == 4)? Intra_mbAddrA_window2:
|
PE1_in1 <= (blk4x4_intra_calculate_counter == 4)? Intra_mbAddrA_window2:
|
(blk4x4_intra_calculate_counter == 3)? Intra_mbAddrA_window3:0;
|
(blk4x4_intra_calculate_counter == 3)? Intra_mbAddrA_window3:0;
|
PE1_in2 <= (blk4x4_intra_calculate_counter == 3)? Intra_mbAddrA_window2:0;
|
PE1_in2 <= (blk4x4_intra_calculate_counter == 3)? Intra_mbAddrA_window2:0;
|
PE1_in3 <= 0;
|
PE1_in3 <= 0;
|
PE1_IsShift <= (blk4x4_intra_calculate_counter == 3)? 1'b1:1'b0;
|
PE1_IsShift <= (blk4x4_intra_calculate_counter == 3)? 1'b1:1'b0;
|
PE1_IsStore <= 1'b0; PE1_IsClip <= 1'b0;
|
PE1_IsStore <= 1'b0; PE1_IsClip <= 1'b0;
|
PE1_full_bypass <= (blk4x4_intra_calculate_counter == 2 ||
|
PE1_full_bypass <= (blk4x4_intra_calculate_counter == 2 ||
|
blk4x4_intra_calculate_counter == 1)? 1'b1:1'b0;
|
blk4x4_intra_calculate_counter == 1)? 1'b1:1'b0;
|
PE1_round_value <= (blk4x4_intra_calculate_counter == 4)? 5'd1:
|
PE1_round_value <= (blk4x4_intra_calculate_counter == 4)? 5'd1:
|
(blk4x4_intra_calculate_counter == 3)? 5'd2:5'd0;
|
(blk4x4_intra_calculate_counter == 3)? 5'd2:5'd0;
|
PE1_shift_len <= (blk4x4_intra_calculate_counter == 4)? 3'd1:
|
PE1_shift_len <= (blk4x4_intra_calculate_counter == 4)? 3'd1:
|
(blk4x4_intra_calculate_counter == 3)? 3'd2:3'd0;
|
(blk4x4_intra_calculate_counter == 3)? 3'd2:3'd0;
|
end
|
end
|
default:
|
default:
|
begin
|
begin
|
PE1_in0 <= 0; PE1_in1 <= 0; PE1_in2 <= 0; PE1_in3 <= 0;
|
PE1_in0 <= 0; PE1_in1 <= 0; PE1_in2 <= 0; PE1_in3 <= 0;
|
PE1_IsShift <= 0; PE1_IsStore <= 0; PE1_IsClip <= 0;
|
PE1_IsShift <= 0; PE1_IsStore <= 0; PE1_IsClip <= 0;
|
PE1_full_bypass <= 0; PE1_round_value <= 0; PE1_shift_len <= 0;
|
PE1_full_bypass <= 0; PE1_round_value <= 0; PE1_shift_len <= 0;
|
end
|
end
|
endcase
|
endcase
|
//Intra16x16
|
//Intra16x16
|
else if (mb_type_general[3:2] == 2'b10 && blk4x4_rec_counter < 16)
|
else if (mb_type_general[3:2] == 2'b10 && blk4x4_rec_counter < 16)
|
case (Intra16x16_predmode)
|
case (Intra16x16_predmode)
|
`Intra16x16_Vertical: //---Vertical---
|
`Intra16x16_Vertical: //---Vertical---
|
begin
|
begin
|
case (blk4x4_intra_calculate_counter)
|
case (blk4x4_intra_calculate_counter)
|
4:PE1_in0 <= Intra_mbAddrB_window0;
|
4:PE1_in0 <= Intra_mbAddrB_window0;
|
3:PE1_in0 <= Intra_mbAddrB_window1;
|
3:PE1_in0 <= Intra_mbAddrB_window1;
|
2:PE1_in0 <= Intra_mbAddrB_window2;
|
2:PE1_in0 <= Intra_mbAddrB_window2;
|
1:PE1_in0 <= Intra_mbAddrB_window3;
|
1:PE1_in0 <= Intra_mbAddrB_window3;
|
default:PE1_in0 <= 0;
|
default:PE1_in0 <= 0;
|
endcase
|
endcase
|
PE1_in1 <= 0; PE1_in2 <= 0; PE1_in3 <= 0;
|
PE1_in1 <= 0; PE1_in2 <= 0; PE1_in3 <= 0;
|
PE1_IsShift <= 0; PE1_IsStore <= 0; PE1_IsClip <= 0;
|
PE1_IsShift <= 0; PE1_IsStore <= 0; PE1_IsClip <= 0;
|
PE1_full_bypass <= 1; PE1_round_value <= 0; PE1_shift_len <= 0;
|
PE1_full_bypass <= 1; PE1_round_value <= 0; PE1_shift_len <= 0;
|
end
|
end
|
`Intra16x16_Horizontal: //---Horizontal---
|
`Intra16x16_Horizontal: //---Horizontal---
|
begin
|
begin
|
PE1_in0 <= (blk4x4_intra_calculate_counter != 0)? Intra_mbAddrA_window1:0;
|
PE1_in0 <= (blk4x4_intra_calculate_counter != 0)? Intra_mbAddrA_window1:0;
|
PE1_in1 <= 0; PE1_in2 <= 0; PE1_in3 <= 0;
|
PE1_in1 <= 0; PE1_in2 <= 0; PE1_in3 <= 0;
|
PE1_IsShift <= 0; PE1_IsStore <= 0; PE1_IsClip <= 0;
|
PE1_IsShift <= 0; PE1_IsStore <= 0; PE1_IsClip <= 0;
|
PE1_full_bypass <= 1; PE1_round_value <= 0; PE1_shift_len <= 0;
|
PE1_full_bypass <= 1; PE1_round_value <= 0; PE1_shift_len <= 0;
|
end
|
end
|
`Intra16x16_DC: //---DC---
|
`Intra16x16_DC: //---DC---
|
if (blk4x4_rec_counter == 0)
|
if (blk4x4_rec_counter == 0)
|
case (blk4x4_intra_calculate_counter)
|
case (blk4x4_intra_calculate_counter)
|
4:begin // E2 + F2 + G2 + H2
|
4:begin // E2 + F2 + G2 + H2
|
PE1_in0 <= (mbAddrA_availability == 0)? 0:Intra_mbAddrA_reg4;
|
PE1_in0 <= (mbAddrA_availability == 0)? 0:Intra_mbAddrA_reg4;
|
PE1_in1 <= (mbAddrA_availability == 0)? 0:Intra_mbAddrA_reg5;
|
PE1_in1 <= (mbAddrA_availability == 0)? 0:Intra_mbAddrA_reg5;
|
PE1_in2 <= (mbAddrA_availability == 0)? 0:Intra_mbAddrA_reg6;
|
PE1_in2 <= (mbAddrA_availability == 0)? 0:Intra_mbAddrA_reg6;
|
PE1_in3 <= (mbAddrA_availability == 0)? 0:Intra_mbAddrA_reg7;
|
PE1_in3 <= (mbAddrA_availability == 0)? 0:Intra_mbAddrA_reg7;
|
PE1_IsShift <= 0; PE1_IsStore <= 1; PE1_IsClip <= 0;
|
PE1_IsShift <= 0; PE1_IsStore <= 1; PE1_IsClip <= 0;
|
PE1_full_bypass <= 0; PE1_round_value <= 0; PE1_shift_len <= 0; end
|
PE1_full_bypass <= 0; PE1_round_value <= 0; PE1_shift_len <= 0; end
|
3:begin // PE1 output + F1 + G1 + H1
|
3:begin // PE1 output + F1 + G1 + H1
|
PE1_in0 <= PE1_out_reg;
|
PE1_in0 <= PE1_out_reg;
|
PE1_in1 <= (mbAddrB_availability == 0)? 0:Intra_mbAddrB_reg5;
|
PE1_in1 <= (mbAddrB_availability == 0)? 0:Intra_mbAddrB_reg5;
|
PE1_in2 <= (mbAddrB_availability == 0)? 0:Intra_mbAddrB_reg6;
|
PE1_in2 <= (mbAddrB_availability == 0)? 0:Intra_mbAddrB_reg6;
|
PE1_in3 <= (mbAddrB_availability == 0)? 0:Intra_mbAddrB_reg7;
|
PE1_in3 <= (mbAddrB_availability == 0)? 0:Intra_mbAddrB_reg7;
|
PE1_IsShift <= 0; PE1_IsStore <= 1; PE1_IsClip <= 0;
|
PE1_IsShift <= 0; PE1_IsStore <= 1; PE1_IsClip <= 0;
|
PE1_full_bypass <= 0; PE1_round_value <= 0; PE1_shift_len <= 0; end
|
PE1_full_bypass <= 0; PE1_round_value <= 0; PE1_shift_len <= 0; end
|
2:begin // A1 + E1 + I1 + M1
|
2:begin // A1 + E1 + I1 + M1
|
PE1_in0 <= (mbAddrB_availability == 0)? 0:Intra_mbAddrB_reg0;
|
PE1_in0 <= (mbAddrB_availability == 0)? 0:Intra_mbAddrB_reg0;
|
PE1_in1 <= (mbAddrB_availability == 0)? 0:Intra_mbAddrB_reg4;
|
PE1_in1 <= (mbAddrB_availability == 0)? 0:Intra_mbAddrB_reg4;
|
PE1_in2 <= (mbAddrB_availability == 0)? 0:Intra_mbAddrB_reg8;
|
PE1_in2 <= (mbAddrB_availability == 0)? 0:Intra_mbAddrB_reg8;
|
PE1_in3 <= (mbAddrB_availability == 0)? 0:Intra_mbAddrB_reg12;
|
PE1_in3 <= (mbAddrB_availability == 0)? 0:Intra_mbAddrB_reg12;
|
PE1_IsShift <= 0; PE1_IsStore <= 1; PE1_IsClip <= 0;
|
PE1_IsShift <= 0; PE1_IsStore <= 1; PE1_IsClip <= 0;
|
PE1_full_bypass <= 0; PE1_round_value <= 0; PE1_shift_len <= 0; end
|
PE1_full_bypass <= 0; PE1_round_value <= 0; PE1_shift_len <= 0; end
|
default:begin
|
default:begin
|
PE1_in0 <= 0; PE1_in1 <= 0; PE1_in2 <= 0; PE1_in3 <= 0;
|
PE1_in0 <= 0; PE1_in1 <= 0; PE1_in2 <= 0; PE1_in3 <= 0;
|
PE1_IsShift <= 0; PE1_IsStore <= 0; PE1_IsClip <= 0;
|
PE1_IsShift <= 0; PE1_IsStore <= 0; PE1_IsClip <= 0;
|
PE1_full_bypass <= 0; PE1_round_value <= 0; PE1_shift_len <= 0; end
|
PE1_full_bypass <= 0; PE1_round_value <= 0; PE1_shift_len <= 0; end
|
endcase
|
endcase
|
else
|
else
|
begin
|
begin
|
PE1_in0 <= 0; PE1_in1 <= 0; PE1_in2 <= 0; PE1_in3 <= 0;
|
PE1_in0 <= 0; PE1_in1 <= 0; PE1_in2 <= 0; PE1_in3 <= 0;
|
PE1_IsShift <= 0; PE1_IsStore <= 0; PE1_IsClip <= 0;
|
PE1_IsShift <= 0; PE1_IsStore <= 0; PE1_IsClip <= 0;
|
PE1_full_bypass <= 0; PE1_round_value <= 0; PE1_shift_len <= 0;
|
PE1_full_bypass <= 0; PE1_round_value <= 0; PE1_shift_len <= 0;
|
end
|
end
|
`Intra16x16_Plane: //---plane---
|
`Intra16x16_Plane: //---plane---
|
begin
|
begin
|
if (blk4x4_intra_calculate_counter != 0)
|
if (blk4x4_intra_calculate_counter != 0)
|
//blk0,2,4,6,8,10,12,14,calc counter == 3'b100:PE1_in0 <= seed;
|
//blk0,2,4,6,8,10,12,14,calc counter == 3'b100:PE1_in0 <= seed;
|
//other cases :PE1_in0 <= left pixel output
|
//other cases :PE1_in0 <= left pixel output
|
PE1_in0 <= (blk4x4_intra_calculate_counter == 4 && blk4x4_rec_counter[0] == 1'b0)?
|
PE1_in0 <= (blk4x4_intra_calculate_counter == 4 && blk4x4_rec_counter[0] == 1'b0)?
|
seed:PE1_out_reg;
|
seed:PE1_out_reg;
|
else
|
else
|
PE1_in0 <= 0;
|
PE1_in0 <= 0;
|
if (blk4x4_intra_calculate_counter != 0)
|
if (blk4x4_intra_calculate_counter != 0)
|
//blk0,2,8,10,calc counter == 3'b100:PE1_in1 <= c_ext x 2
|
//blk0,2,8,10,calc counter == 3'b100:PE1_in1 <= c_ext x 2
|
//other cases :PE1_in1 <= b_ext
|
//other cases :PE1_in1 <= b_ext
|
PE1_in1 <= (blk4x4_intra_calculate_counter == 4 && !blk4x4_rec_counter[2] && !blk4x4_rec_counter[0])?
|
PE1_in1 <= (blk4x4_intra_calculate_counter == 4 && !blk4x4_rec_counter[2] && !blk4x4_rec_counter[0])?
|
{c_ext[14:0],1'b0}:b_ext;
|
{c_ext[14:0],1'b0}:b_ext;
|
else
|
else
|
PE1_in1 <= 0;
|
PE1_in1 <= 0;
|
//blk4,6,12,14,calc counter == 3'b100:PE1_in2 <= c_ext;
|
//blk4,6,12,14,calc counter == 3'b100:PE1_in2 <= c_ext;
|
//other cases :PE1_in2 <= 0
|
//other cases :PE1_in2 <= 0
|
PE1_in2 <= (blk4x4_intra_calculate_counter == 4 && blk4x4_rec_counter[2] && !blk4x4_rec_counter[0])?
|
PE1_in2 <= (blk4x4_intra_calculate_counter == 4 && blk4x4_rec_counter[2] && !blk4x4_rec_counter[0])?
|
c_ext:0;
|
c_ext:0;
|
PE1_in3 <= 0;
|
PE1_in3 <= 0;
|
PE1_IsShift <= 1'b0;
|
PE1_IsShift <= 1'b0;
|
PE1_IsStore <= (blk4x4_intra_calculate_counter != 0)? 1'b1:1'b0;
|
PE1_IsStore <= (blk4x4_intra_calculate_counter != 0)? 1'b1:1'b0;
|
PE1_IsClip <= (blk4x4_intra_calculate_counter != 0)? 1'b1:1'b0;
|
PE1_IsClip <= (blk4x4_intra_calculate_counter != 0)? 1'b1:1'b0;
|
PE1_full_bypass <= 1'b0;
|
PE1_full_bypass <= 1'b0;
|
PE1_round_value <= (blk4x4_intra_calculate_counter != 0)? 5'd16:5'd0;
|
PE1_round_value <= (blk4x4_intra_calculate_counter != 0)? 5'd16:5'd0;
|
PE1_shift_len <= (blk4x4_intra_calculate_counter != 0)? 3'd5 :3'd0;
|
PE1_shift_len <= (blk4x4_intra_calculate_counter != 0)? 3'd5 :3'd0;
|
end
|
end
|
endcase
|
endcase
|
//Chroma
|
//Chroma
|
else if (mb_type_general[3] == 1'b1 && blk4x4_rec_counter > 15)
|
else if (mb_type_general[3] == 1'b1 && blk4x4_rec_counter > 15)
|
case (Intra_chroma_predmode)
|
case (Intra_chroma_predmode)
|
`Intra_chroma_DC: //---DC---
|
`Intra_chroma_DC: //---DC---
|
if (blk4x4_intra_calculate_counter == 4)
|
if (blk4x4_intra_calculate_counter == 4)
|
begin
|
begin
|
case ({mbAddrA_availability,mbAddrB_availability})
|
case ({mbAddrA_availability,mbAddrB_availability})
|
2'b00,2'b01:
|
2'b00,2'b01:
|
begin
|
begin
|
PE1_in0 <= 0; PE1_in1 <= 0; PE1_in2 <= 0; PE1_in3 <= 0;
|
PE1_in0 <= 0; PE1_in1 <= 0; PE1_in2 <= 0; PE1_in3 <= 0;
|
end
|
end
|
2'b10:
|
2'b10:
|
begin
|
begin
|
PE1_in0 <= Intra_mbAddrA_window0; PE1_in1 <= Intra_mbAddrA_window1;
|
PE1_in0 <= Intra_mbAddrA_window0; PE1_in1 <= Intra_mbAddrA_window1;
|
PE1_in2 <= Intra_mbAddrA_window2; PE1_in3 <= Intra_mbAddrA_window3;
|
PE1_in2 <= Intra_mbAddrA_window2; PE1_in3 <= Intra_mbAddrA_window3;
|
end
|
end
|
2'b11:
|
2'b11:
|
begin
|
begin
|
PE1_in0 <= (blk4x4_rec_counter == 17 || blk4x4_rec_counter == 21)?
|
PE1_in0 <= (blk4x4_rec_counter == 17 || blk4x4_rec_counter == 21)?
|
0:Intra_mbAddrA_window0;
|
0:Intra_mbAddrA_window0;
|
PE1_in1 <= (blk4x4_rec_counter == 17 || blk4x4_rec_counter == 21)?
|
PE1_in1 <= (blk4x4_rec_counter == 17 || blk4x4_rec_counter == 21)?
|
0:Intra_mbAddrA_window1;
|
0:Intra_mbAddrA_window1;
|
PE1_in2 <= (blk4x4_rec_counter == 17 || blk4x4_rec_counter == 21)?
|
PE1_in2 <= (blk4x4_rec_counter == 17 || blk4x4_rec_counter == 21)?
|
0:Intra_mbAddrA_window2;
|
0:Intra_mbAddrA_window2;
|
PE1_in3 <= (blk4x4_rec_counter == 17 || blk4x4_rec_counter == 21)?
|
PE1_in3 <= (blk4x4_rec_counter == 17 || blk4x4_rec_counter == 21)?
|
0:Intra_mbAddrA_window3;
|
0:Intra_mbAddrA_window3;
|
end
|
end
|
endcase
|
endcase
|
PE1_IsShift <= 1'b0; PE1_IsClip <= 1'b0;
|
PE1_IsShift <= 1'b0; PE1_IsClip <= 1'b0;
|
PE1_IsStore <= (mbAddrA_availability)? 1'b1:1'b0;
|
PE1_IsStore <= (mbAddrA_availability)? 1'b1:1'b0;
|
PE1_full_bypass <= 1'b0;
|
PE1_full_bypass <= 1'b0;
|
PE1_round_value <= 0; PE1_shift_len <= 0;
|
PE1_round_value <= 0; PE1_shift_len <= 0;
|
end
|
end
|
else
|
else
|
begin
|
begin
|
PE1_in0 <= 0; PE1_in1 <= 0; PE1_in2 <= 0; PE1_in3 <= 0;
|
PE1_in0 <= 0; PE1_in1 <= 0; PE1_in2 <= 0; PE1_in3 <= 0;
|
PE1_IsShift <= 0; PE1_IsStore <= 0; PE1_IsClip <= 0;
|
PE1_IsShift <= 0; PE1_IsStore <= 0; PE1_IsClip <= 0;
|
PE1_full_bypass <= 0; PE1_round_value <= 0; PE1_shift_len <= 0;
|
PE1_full_bypass <= 0; PE1_round_value <= 0; PE1_shift_len <= 0;
|
end
|
end
|
`Intra_chroma_Horizontal: //---horizontal---
|
`Intra_chroma_Horizontal: //---horizontal---
|
begin
|
begin
|
PE1_in0 <= (blk4x4_intra_calculate_counter != 0)? Intra_mbAddrA_window1:0;
|
PE1_in0 <= (blk4x4_intra_calculate_counter != 0)? Intra_mbAddrA_window1:0;
|
PE1_in1 <= 0; PE1_in2 <= 0; PE1_in3 <= 0;
|
PE1_in1 <= 0; PE1_in2 <= 0; PE1_in3 <= 0;
|
PE1_IsShift <= 0; PE1_IsStore <= 0; PE1_IsClip <= 0;
|
PE1_IsShift <= 0; PE1_IsStore <= 0; PE1_IsClip <= 0;
|
PE1_full_bypass <= 1; PE1_round_value <= 0; PE1_shift_len <= 0;
|
PE1_full_bypass <= 1; PE1_round_value <= 0; PE1_shift_len <= 0;
|
end
|
end
|
`Intra_chroma_Vertical: //---vertical---
|
`Intra_chroma_Vertical: //---vertical---
|
begin
|
begin
|
case (blk4x4_intra_calculate_counter)
|
case (blk4x4_intra_calculate_counter)
|
4:PE1_in0 <= Intra_mbAddrB_window0;
|
4:PE1_in0 <= Intra_mbAddrB_window0;
|
3:PE1_in0 <= Intra_mbAddrB_window1;
|
3:PE1_in0 <= Intra_mbAddrB_window1;
|
2:PE1_in0 <= Intra_mbAddrB_window2;
|
2:PE1_in0 <= Intra_mbAddrB_window2;
|
1:PE1_in0 <= Intra_mbAddrB_window3;
|
1:PE1_in0 <= Intra_mbAddrB_window3;
|
default:PE1_in0 <= 0;
|
default:PE1_in0 <= 0;
|
endcase
|
endcase
|
PE1_in1 <= 0; PE1_in2 <= 0; PE1_in3 <= 0;
|
PE1_in1 <= 0; PE1_in2 <= 0; PE1_in3 <= 0;
|
PE1_IsShift <= 0; PE1_IsStore <= 0; PE1_IsClip <= 0;
|
PE1_IsShift <= 0; PE1_IsStore <= 0; PE1_IsClip <= 0;
|
PE1_full_bypass <= 1; PE1_round_value <= 0; PE1_shift_len <= 0;
|
PE1_full_bypass <= 1; PE1_round_value <= 0; PE1_shift_len <= 0;
|
end
|
end
|
`Intra_chroma_Plane: //---plane---
|
`Intra_chroma_Plane: //---plane---
|
begin
|
begin
|
if (blk4x4_intra_calculate_counter != 0)
|
if (blk4x4_intra_calculate_counter != 0)
|
//need seed, blk4x4 = 16 | 18 | 20 | 22
|
//need seed, blk4x4 = 16 | 18 | 20 | 22
|
//do not need seed,blk4x4 = 17 | 19 | 21 | 23
|
//do not need seed,blk4x4 = 17 | 19 | 21 | 23
|
PE1_in0 <= (blk4x4_rec_counter[0] == 1'b0 && blk4x4_intra_calculate_counter == 4)?
|
PE1_in0 <= (blk4x4_rec_counter[0] == 1'b0 && blk4x4_intra_calculate_counter == 4)?
|
seed:PE1_out_reg;
|
seed:PE1_out_reg;
|
else
|
else
|
PE1_in0 <= 0;
|
PE1_in0 <= 0;
|
if (blk4x4_intra_calculate_counter != 0)
|
if (blk4x4_intra_calculate_counter != 0)
|
PE1_in1 <= (blk4x4_rec_counter[0] == 1'b0 && blk4x4_intra_calculate_counter == 4)?
|
PE1_in1 <= (blk4x4_rec_counter[0] == 1'b0 && blk4x4_intra_calculate_counter == 4)?
|
0:b_ext;
|
0:b_ext;
|
else
|
else
|
PE1_in1 <= 0;
|
PE1_in1 <= 0;
|
//0,2,8,10,the 4th cycle,+2c
|
//0,2,8,10,the 4th cycle,+2c
|
PE1_in2 <= (blk4x4_rec_counter[0] == 1'b0 && blk4x4_intra_calculate_counter == 4)? c_ext:0;
|
PE1_in2 <= (blk4x4_rec_counter[0] == 1'b0 && blk4x4_intra_calculate_counter == 4)? c_ext:0;
|
PE1_in3 <= 0;
|
PE1_in3 <= 0;
|
PE1_IsShift <= (blk4x4_rec_counter[0] == 1'b0 && blk4x4_intra_calculate_counter == 4)?
|
PE1_IsShift <= (blk4x4_rec_counter[0] == 1'b0 && blk4x4_intra_calculate_counter == 4)?
|
1'b1:1'b0;
|
1'b1:1'b0;
|
PE1_IsStore <= (blk4x4_intra_calculate_counter != 0)? 1'b1:1'b0;
|
PE1_IsStore <= (blk4x4_intra_calculate_counter != 0)? 1'b1:1'b0;
|
PE1_IsClip <= (blk4x4_intra_calculate_counter != 0)? 1'b1:1'b0;
|
PE1_IsClip <= (blk4x4_intra_calculate_counter != 0)? 1'b1:1'b0;
|
PE1_full_bypass <= 1'b0;
|
PE1_full_bypass <= 1'b0;
|
PE1_round_value <= (blk4x4_intra_calculate_counter != 0)? 5'd16:5'd0;
|
PE1_round_value <= (blk4x4_intra_calculate_counter != 0)? 5'd16:5'd0;
|
PE1_shift_len <= (blk4x4_intra_calculate_counter != 0)? 3'd5 :3'd0;
|
PE1_shift_len <= (blk4x4_intra_calculate_counter != 0)? 3'd5 :3'd0;
|
end
|
end
|
endcase
|
endcase
|
else
|
else
|
begin
|
begin
|
PE1_in0 <= 0; PE1_in1 <= 0; PE1_in2 <= 0; PE1_in3 <= 0;
|
PE1_in0 <= 0; PE1_in1 <= 0; PE1_in2 <= 0; PE1_in3 <= 0;
|
PE1_IsShift <= 0; PE1_IsStore <= 0; PE1_IsClip <= 0;
|
PE1_IsShift <= 0; PE1_IsStore <= 0; PE1_IsClip <= 0;
|
PE1_full_bypass <= 0; PE1_round_value <= 0; PE1_shift_len <= 0;
|
PE1_full_bypass <= 0; PE1_round_value <= 0; PE1_shift_len <= 0;
|
end
|
end
|
|
|
//----
|
//----
|
//PE2 |
|
//PE2 |
|
//----
|
//----
|
always @ (mb_type_general or blk4x4_rec_counter or blk4x4_intra_calculate_counter
|
always @ (mb_type_general or blk4x4_rec_counter or blk4x4_intra_calculate_counter
|
or Intra4x4_predmode or Intra16x16_predmode or Intra_chroma_predmode
|
or Intra4x4_predmode or Intra16x16_predmode or Intra_chroma_predmode
|
or mbAddrA_availability or mbAddrB_availability
|
or mbAddrA_availability or mbAddrB_availability
|
|
|
or Intra_mbAddrA_window0 or Intra_mbAddrA_window1 or Intra_mbAddrA_window2 or Intra_mbAddrA_window3
|
or Intra_mbAddrA_window0 or Intra_mbAddrA_window1 or Intra_mbAddrA_window2 or Intra_mbAddrA_window3
|
or Intra_mbAddrB_window0 or Intra_mbAddrB_window1 or Intra_mbAddrB_window2 or Intra_mbAddrB_window3
|
or Intra_mbAddrB_window0 or Intra_mbAddrB_window1 or Intra_mbAddrB_window2 or Intra_mbAddrB_window3
|
or Intra_mbAddrD_window
|
or Intra_mbAddrD_window
|
or Intra_mbAddrC_window0 or Intra_mbAddrC_window1
|
or Intra_mbAddrC_window0 or Intra_mbAddrC_window1
|
|
|
or Intra_mbAddrA_reg8 or Intra_mbAddrA_reg9 or Intra_mbAddrA_reg10 or Intra_mbAddrA_reg11
|
or Intra_mbAddrA_reg8 or Intra_mbAddrA_reg9 or Intra_mbAddrA_reg10 or Intra_mbAddrA_reg11
|
or Intra_mbAddrB_reg9 or Intra_mbAddrB_reg10 or Intra_mbAddrB_reg11
|
or Intra_mbAddrB_reg9 or Intra_mbAddrB_reg10 or Intra_mbAddrB_reg11
|
or blk4x4_pred_output0 or blk4x4_pred_output1 or blk4x4_pred_output2
|
or blk4x4_pred_output0 or blk4x4_pred_output1 or blk4x4_pred_output2
|
or blk4x4_pred_output4 or blk4x4_pred_output5 or blk4x4_pred_output12
|
or blk4x4_pred_output4 or blk4x4_pred_output5 or blk4x4_pred_output12
|
or blk4x4_pred_output13 or blk4x4_pred_output14
|
or blk4x4_pred_output13 or blk4x4_pred_output14
|
or PE2_out_reg
|
or PE2_out_reg
|
|
|
or seed or b_ext or c_ext)
|
or seed or b_ext or c_ext)
|
//Intra 4x4
|
//Intra 4x4
|
if (mb_type_general[3:2] == 2'b11 && blk4x4_rec_counter < 16)
|
if (mb_type_general[3:2] == 2'b11 && blk4x4_rec_counter < 16)
|
case (Intra4x4_predmode)
|
case (Intra4x4_predmode)
|
`Intra4x4_Vertical: //---Vertical---
|
`Intra4x4_Vertical: //---Vertical---
|
begin
|
begin
|
case (blk4x4_intra_calculate_counter)
|
case (blk4x4_intra_calculate_counter)
|
4:PE2_in0 <= Intra_mbAddrB_window0;
|
4:PE2_in0 <= Intra_mbAddrB_window0;
|
3:PE2_in0 <= Intra_mbAddrB_window1;
|
3:PE2_in0 <= Intra_mbAddrB_window1;
|
2:PE2_in0 <= Intra_mbAddrB_window2;
|
2:PE2_in0 <= Intra_mbAddrB_window2;
|
1:PE2_in0 <= Intra_mbAddrB_window3;
|
1:PE2_in0 <= Intra_mbAddrB_window3;
|
default:PE2_in0 <= 0;
|
default:PE2_in0 <= 0;
|
endcase
|
endcase
|
PE2_in1 <= 0; PE2_in2 <= 0; PE2_in3 <= 0;
|
PE2_in1 <= 0; PE2_in2 <= 0; PE2_in3 <= 0;
|
PE2_IsShift <= 0; PE2_IsStore <= 0; PE2_IsClip <= 0;
|
PE2_IsShift <= 0; PE2_IsStore <= 0; PE2_IsClip <= 0;
|
PE2_full_bypass <= 1; PE2_round_value <= 0; PE2_shift_len <= 0;
|
PE2_full_bypass <= 1; PE2_round_value <= 0; PE2_shift_len <= 0;
|
end
|
end
|
`Intra4x4_Horizontal: //---Horizontal---
|
`Intra4x4_Horizontal: //---Horizontal---
|
begin
|
begin
|
PE2_in0 <= (blk4x4_intra_calculate_counter != 0)? Intra_mbAddrA_window2:0;
|
PE2_in0 <= (blk4x4_intra_calculate_counter != 0)? Intra_mbAddrA_window2:0;
|
PE2_in1 <= 0; PE2_in2 <= 0; PE2_in3 <= 0;
|
PE2_in1 <= 0; PE2_in2 <= 0; PE2_in3 <= 0;
|
PE2_IsShift <= 0; PE2_IsStore <= 0; PE2_IsClip <= 0;
|
PE2_IsShift <= 0; PE2_IsStore <= 0; PE2_IsClip <= 0;
|
PE2_full_bypass <= 1; PE2_round_value <= 0; PE2_shift_len <= 0;
|
PE2_full_bypass <= 1; PE2_round_value <= 0; PE2_shift_len <= 0;
|
end
|
end
|
//-------------
|
//-------------
|
//no PE2 for DC
|
//no PE2 for DC
|
//4'b0010:
|
//4'b0010:
|
//-------------
|
//-------------
|
`Intra4x4_Diagonal_Down_Left: //---diagonal down-left---
|
`Intra4x4_Diagonal_Down_Left: //---diagonal down-left---
|
begin
|
begin
|
case (blk4x4_intra_calculate_counter)
|
case (blk4x4_intra_calculate_counter)
|
4:PE2_in0 <= Intra_mbAddrB_window2;
|
4:PE2_in0 <= Intra_mbAddrB_window2;
|
3:PE2_in0 <= blk4x4_pred_output12;
|
3:PE2_in0 <= blk4x4_pred_output12;
|
2:PE2_in0 <= blk4x4_pred_output13;
|
2:PE2_in0 <= blk4x4_pred_output13;
|
1:PE2_in0 <= blk4x4_pred_output14;
|
1:PE2_in0 <= blk4x4_pred_output14;
|
default:PE2_in0 <= 0;
|
default:PE2_in0 <= 0;
|
endcase
|
endcase
|
PE2_in1 <= (blk4x4_intra_calculate_counter == 4)? Intra_mbAddrC_window0:0;
|
PE2_in1 <= (blk4x4_intra_calculate_counter == 4)? Intra_mbAddrC_window0:0;
|
PE2_in2 <= (blk4x4_intra_calculate_counter == 4)? Intra_mbAddrB_window3:0;
|
PE2_in2 <= (blk4x4_intra_calculate_counter == 4)? Intra_mbAddrB_window3:0;
|
PE2_in3 <= 0;
|
PE2_in3 <= 0;
|
PE2_IsShift <= (blk4x4_intra_calculate_counter == 4)? 1'b1:1'b0;
|
PE2_IsShift <= (blk4x4_intra_calculate_counter == 4)? 1'b1:1'b0;
|
PE2_IsStore <= 1'b0; PE2_IsClip <= 1'b0;
|
PE2_IsStore <= 1'b0; PE2_IsClip <= 1'b0;
|
PE2_full_bypass <= (blk4x4_intra_calculate_counter == 4)? 1'b0:1'b1;
|
PE2_full_bypass <= (blk4x4_intra_calculate_counter == 4)? 1'b0:1'b1;
|
PE2_round_value <= (blk4x4_intra_calculate_counter == 4)? 5'd2:5'd0; // +2
|
PE2_round_value <= (blk4x4_intra_calculate_counter == 4)? 5'd2:5'd0; // +2
|
PE2_shift_len <= (blk4x4_intra_calculate_counter == 4)? 3'd2:3'd0; // >>2
|
PE2_shift_len <= (blk4x4_intra_calculate_counter == 4)? 3'd2:3'd0; // >>2
|
end
|
end
|
`Intra4x4_Diagonal_Down_Right: //---diagonal down-right---
|
`Intra4x4_Diagonal_Down_Right: //---diagonal down-right---
|
begin
|
begin
|
case (blk4x4_intra_calculate_counter)
|
case (blk4x4_intra_calculate_counter)
|
4:PE2_in0 <= Intra_mbAddrA_window0;
|
4:PE2_in0 <= Intra_mbAddrA_window0;
|
3:PE2_in0 <= blk4x4_pred_output4;
|
3:PE2_in0 <= blk4x4_pred_output4;
|
2:PE2_in0 <= blk4x4_pred_output0;
|
2:PE2_in0 <= blk4x4_pred_output0;
|
1:PE2_in0 <= blk4x4_pred_output1;
|
1:PE2_in0 <= blk4x4_pred_output1;
|
default:PE2_in0 <= 0;
|
default:PE2_in0 <= 0;
|
endcase
|
endcase
|
PE2_in1 <= (blk4x4_intra_calculate_counter == 4)? Intra_mbAddrA_window2:0;
|
PE2_in1 <= (blk4x4_intra_calculate_counter == 4)? Intra_mbAddrA_window2:0;
|
PE2_in2 <= (blk4x4_intra_calculate_counter == 4)? Intra_mbAddrA_window1:0;
|
PE2_in2 <= (blk4x4_intra_calculate_counter == 4)? Intra_mbAddrA_window1:0;
|
PE2_in3 <= 0;
|
PE2_in3 <= 0;
|
PE2_IsShift <= (blk4x4_intra_calculate_counter == 0)? 1'b0:1'b1;
|
PE2_IsShift <= (blk4x4_intra_calculate_counter == 0)? 1'b0:1'b1;
|
PE2_IsStore <= 1'b0; PE2_IsClip <= 1'b0;
|
PE2_IsStore <= 1'b0; PE2_IsClip <= 1'b0;
|
PE2_full_bypass <= (blk4x4_intra_calculate_counter == 4)? 1'b0:1'b1;
|
PE2_full_bypass <= (blk4x4_intra_calculate_counter == 4)? 1'b0:1'b1;
|
PE2_round_value <= (blk4x4_intra_calculate_counter == 0)? 5'd0:5'd2; // +2
|
PE2_round_value <= (blk4x4_intra_calculate_counter == 0)? 5'd0:5'd2; // +2
|
PE2_shift_len <= (blk4x4_intra_calculate_counter == 0)? 3'd0:3'd2; // >>2
|
PE2_shift_len <= (blk4x4_intra_calculate_counter == 0)? 3'd0:3'd2; // >>2
|
end
|
end
|
`Intra4x4_Vertical_Right: //---vertical right---
|
`Intra4x4_Vertical_Right: //---vertical right---
|
begin
|
begin
|
case (blk4x4_intra_calculate_counter)
|
case (blk4x4_intra_calculate_counter)
|
4:PE2_in0 <= Intra_mbAddrD_window;
|
4:PE2_in0 <= Intra_mbAddrD_window;
|
3:PE2_in0 <= blk4x4_pred_output0;
|
3:PE2_in0 <= blk4x4_pred_output0;
|
2:PE2_in0 <= blk4x4_pred_output1;
|
2:PE2_in0 <= blk4x4_pred_output1;
|
1:PE2_in0 <= blk4x4_pred_output2;
|
1:PE2_in0 <= blk4x4_pred_output2;
|
default:PE2_in0 <= 0;
|
default:PE2_in0 <= 0;
|
endcase
|
endcase
|
PE2_in1 <= (blk4x4_intra_calculate_counter == 4)? Intra_mbAddrA_window1:0;
|
PE2_in1 <= (blk4x4_intra_calculate_counter == 4)? Intra_mbAddrA_window1:0;
|
PE2_in2 <= (blk4x4_intra_calculate_counter == 4)? Intra_mbAddrA_window0:0;
|
PE2_in2 <= (blk4x4_intra_calculate_counter == 4)? Intra_mbAddrA_window0:0;
|
PE2_in3 <= 0;
|
PE2_in3 <= 0;
|
PE2_IsShift <= (blk4x4_intra_calculate_counter == 0)? 1'b0:1'b1;
|
PE2_IsShift <= (blk4x4_intra_calculate_counter == 0)? 1'b0:1'b1;
|
PE2_IsStore <= 1'b0; PE2_IsClip <= 1'b0;
|
PE2_IsStore <= 1'b0; PE2_IsClip <= 1'b0;
|
PE2_full_bypass <= (blk4x4_intra_calculate_counter == 4)? 1'b0:1'b1;
|
PE2_full_bypass <= (blk4x4_intra_calculate_counter == 4)? 1'b0:1'b1;
|
PE2_round_value <= (blk4x4_intra_calculate_counter == 0)? 5'd0:5'd2; // +2
|
PE2_round_value <= (blk4x4_intra_calculate_counter == 0)? 5'd0:5'd2; // +2
|
PE2_shift_len <= (blk4x4_intra_calculate_counter == 0)? 3'd0:3'd2; // >>2
|
PE2_shift_len <= (blk4x4_intra_calculate_counter == 0)? 3'd0:3'd2; // >>2
|
end
|
end
|
`Intra4x4_Horizontal_Down: //---horizontal down---
|
`Intra4x4_Horizontal_Down: //---horizontal down---
|
begin
|
begin
|
case (blk4x4_intra_calculate_counter)
|
case (blk4x4_intra_calculate_counter)
|
4:PE2_in0 <= Intra_mbAddrA_window1;
|
4:PE2_in0 <= Intra_mbAddrA_window1;
|
3:PE2_in0 <= Intra_mbAddrA_window0;
|
3:PE2_in0 <= Intra_mbAddrA_window0;
|
2:PE2_in0 <= blk4x4_pred_output4;
|
2:PE2_in0 <= blk4x4_pred_output4;
|
1:PE2_in0 <= blk4x4_pred_output5;
|
1:PE2_in0 <= blk4x4_pred_output5;
|
default:PE2_in0 <= 0;
|
default:PE2_in0 <= 0;
|
endcase
|
endcase
|
PE2_in1 <= (blk4x4_intra_calculate_counter == 4 || blk4x4_intra_calculate_counter == 3)?
|
PE2_in1 <= (blk4x4_intra_calculate_counter == 4 || blk4x4_intra_calculate_counter == 3)?
|
Intra_mbAddrA_window2:0;
|
Intra_mbAddrA_window2:0;
|
PE2_in2 <= (blk4x4_intra_calculate_counter == 3)? Intra_mbAddrA_window1:0;
|
PE2_in2 <= (blk4x4_intra_calculate_counter == 3)? Intra_mbAddrA_window1:0;
|
PE2_in3 <= 0;
|
PE2_in3 <= 0;
|
PE2_IsShift <= (blk4x4_intra_calculate_counter == 3)? 1'b1:1'b0;
|
PE2_IsShift <= (blk4x4_intra_calculate_counter == 3)? 1'b1:1'b0;
|
PE2_IsStore <= 1'b0; PE2_IsClip <= 1'b0;
|
PE2_IsStore <= 1'b0; PE2_IsClip <= 1'b0;
|
PE2_full_bypass <= (blk4x4_intra_calculate_counter == 2 ||
|
PE2_full_bypass <= (blk4x4_intra_calculate_counter == 2 ||
|
blk4x4_intra_calculate_counter == 1)? 1'b1:1'b0;
|
blk4x4_intra_calculate_counter == 1)? 1'b1:1'b0;
|
PE2_round_value <= (blk4x4_intra_calculate_counter == 4)? 5'd1:
|
PE2_round_value <= (blk4x4_intra_calculate_counter == 4)? 5'd1:
|
(blk4x4_intra_calculate_counter == 3)? 5'd2:5'd0;
|
(blk4x4_intra_calculate_counter == 3)? 5'd2:5'd0;
|
PE2_shift_len <= (blk4x4_intra_calculate_counter == 4)? 3'd1:
|
PE2_shift_len <= (blk4x4_intra_calculate_counter == 4)? 3'd1:
|
(blk4x4_intra_calculate_counter == 3)? 3'd2:3'd0;
|
(blk4x4_intra_calculate_counter == 3)? 3'd2:3'd0;
|
end
|
end
|
`Intra4x4_Vertical_Left: //---vertical left---
|
`Intra4x4_Vertical_Left: //---vertical left---
|
begin
|
begin
|
case (blk4x4_intra_calculate_counter)
|
case (blk4x4_intra_calculate_counter)
|
4:PE2_in0 <= Intra_mbAddrB_window1;
|
4:PE2_in0 <= Intra_mbAddrB_window1;
|
3:PE2_in0 <= Intra_mbAddrB_window3;
|
3:PE2_in0 <= Intra_mbAddrB_window3;
|
2:PE2_in0 <= Intra_mbAddrB_window3;
|
2:PE2_in0 <= Intra_mbAddrB_window3;
|
1:PE2_in0 <= Intra_mbAddrC_window1;
|
1:PE2_in0 <= Intra_mbAddrC_window1;
|
default:PE2_in0 <= 0;
|
default:PE2_in0 <= 0;
|
endcase
|
endcase
|
case (blk4x4_intra_calculate_counter)
|
case (blk4x4_intra_calculate_counter)
|
4,3:PE2_in1 <= Intra_mbAddrB_window2;
|
4,3:PE2_in1 <= Intra_mbAddrB_window2;
|
2,1:PE2_in1 <= Intra_mbAddrC_window0;
|
2,1:PE2_in1 <= Intra_mbAddrC_window0;
|
default:PE2_in1 <= 0;
|
default:PE2_in1 <= 0;
|
endcase
|
endcase
|
PE2_in2 <= 0; PE2_in3 <= 0;
|
PE2_in2 <= 0; PE2_in3 <= 0;
|
PE2_IsShift <= 0; PE2_IsStore <= 0; PE2_IsClip <= 1'b0; PE2_full_bypass <= 1'b0;
|
PE2_IsShift <= 0; PE2_IsStore <= 0; PE2_IsClip <= 1'b0; PE2_full_bypass <= 1'b0;
|
PE2_round_value <= (blk4x4_intra_calculate_counter != 0)? 5'd1:5'd0; // +1
|
PE2_round_value <= (blk4x4_intra_calculate_counter != 0)? 5'd1:5'd0; // +1
|
PE2_shift_len <= (blk4x4_intra_calculate_counter != 0)? 3'd1:3'd0; // >>1
|
PE2_shift_len <= (blk4x4_intra_calculate_counter != 0)? 3'd1:3'd0; // >>1
|
end
|
end
|
`Intra4x4_Horizontal_Up: //---horizontal up---
|
`Intra4x4_Horizontal_Up: //---horizontal up---
|
begin
|
begin
|
case (blk4x4_intra_calculate_counter)
|
case (blk4x4_intra_calculate_counter)
|
4,3:PE2_in0 <= Intra_mbAddrA_window2;
|
4,3:PE2_in0 <= Intra_mbAddrA_window2;
|
2,1:PE2_in0 <= blk4x4_pred_output12;
|
2,1:PE2_in0 <= blk4x4_pred_output12;
|
default:PE2_in0 <= 0;
|
default:PE2_in0 <= 0;
|
endcase
|
endcase
|
PE2_in1 <= (blk4x4_intra_calculate_counter == 4 || blk4x4_intra_calculate_counter == 3)?
|
PE2_in1 <= (blk4x4_intra_calculate_counter == 4 || blk4x4_intra_calculate_counter == 3)?
|
Intra_mbAddrA_window3:0;
|
Intra_mbAddrA_window3:0;
|
PE2_in2 <= (blk4x4_intra_calculate_counter == 3)? Intra_mbAddrA_window3:0;
|
PE2_in2 <= (blk4x4_intra_calculate_counter == 3)? Intra_mbAddrA_window3:0;
|
PE2_in3 <= 0;
|
PE2_in3 <= 0;
|
PE2_IsShift <= (blk4x4_intra_calculate_counter == 3)? 1'b1:1'b0;
|
PE2_IsShift <= (blk4x4_intra_calculate_counter == 3)? 1'b1:1'b0;
|
PE2_IsStore <= 1'b0; PE2_IsClip <= 1'b0;
|
PE2_IsStore <= 1'b0; PE2_IsClip <= 1'b0;
|
PE2_full_bypass <= (blk4x4_intra_calculate_counter == 2 ||
|
PE2_full_bypass <= (blk4x4_intra_calculate_counter == 2 ||
|
blk4x4_intra_calculate_counter == 1)? 1'b1:1'b0;
|
blk4x4_intra_calculate_counter == 1)? 1'b1:1'b0;
|
PE2_round_value <= (blk4x4_intra_calculate_counter == 4)? 5'd1:
|
PE2_round_value <= (blk4x4_intra_calculate_counter == 4)? 5'd1:
|
(blk4x4_intra_calculate_counter == 3)? 5'd2:5'd0;
|
(blk4x4_intra_calculate_counter == 3)? 5'd2:5'd0;
|
PE2_shift_len <= (blk4x4_intra_calculate_counter == 4)? 3'd1:
|
PE2_shift_len <= (blk4x4_intra_calculate_counter == 4)? 3'd1:
|
(blk4x4_intra_calculate_counter == 3)? 3'd2:3'd0;
|
(blk4x4_intra_calculate_counter == 3)? 3'd2:3'd0;
|
end
|
end
|
default:
|
default:
|
begin
|
begin
|
PE2_in0 <= 0; PE2_in1 <= 0; PE2_in2 <= 0; PE2_in3 <= 0;
|
PE2_in0 <= 0; PE2_in1 <= 0; PE2_in2 <= 0; PE2_in3 <= 0;
|
PE2_IsShift <= 0; PE2_IsStore <= 0; PE2_IsClip <= 0;
|
PE2_IsShift <= 0; PE2_IsStore <= 0; PE2_IsClip <= 0;
|
PE2_full_bypass <= 0; PE2_round_value <= 0; PE2_shift_len <= 0;
|
PE2_full_bypass <= 0; PE2_round_value <= 0; PE2_shift_len <= 0;
|
end
|
end
|
endcase
|
endcase
|
//Intra16x16
|
//Intra16x16
|
else if (mb_type_general[3:2] == 2'b10 && blk4x4_rec_counter < 16)
|
else if (mb_type_general[3:2] == 2'b10 && blk4x4_rec_counter < 16)
|
case (Intra16x16_predmode)
|
case (Intra16x16_predmode)
|
`Intra16x16_Vertical: //---Vertical---
|
`Intra16x16_Vertical: //---Vertical---
|
begin
|
begin
|
case (blk4x4_intra_calculate_counter)
|
case (blk4x4_intra_calculate_counter)
|
4:PE2_in0 <= Intra_mbAddrB_window0;
|
4:PE2_in0 <= Intra_mbAddrB_window0;
|
3:PE2_in0 <= Intra_mbAddrB_window1;
|
3:PE2_in0 <= Intra_mbAddrB_window1;
|
2:PE2_in0 <= Intra_mbAddrB_window2;
|
2:PE2_in0 <= Intra_mbAddrB_window2;
|
1:PE2_in0 <= Intra_mbAddrB_window3;
|
1:PE2_in0 <= Intra_mbAddrB_window3;
|
default:PE2_in0 <= 0;
|
default:PE2_in0 <= 0;
|
endcase
|
endcase
|
PE2_in1 <= 0; PE2_in2 <= 0; PE2_in3 <= 0;
|
PE2_in1 <= 0; PE2_in2 <= 0; PE2_in3 <= 0;
|
PE2_IsShift <= 0; PE2_IsStore <= 0; PE2_IsClip <= 0;
|
PE2_IsShift <= 0; PE2_IsStore <= 0; PE2_IsClip <= 0;
|
PE2_full_bypass <= 1; PE2_round_value <= 0; PE2_shift_len <= 0;
|
PE2_full_bypass <= 1; PE2_round_value <= 0; PE2_shift_len <= 0;
|
end
|
end
|
`Intra16x16_Horizontal: //---Horizontal---
|
`Intra16x16_Horizontal: //---Horizontal---
|
begin
|
begin
|
PE2_in0 <= (blk4x4_intra_calculate_counter != 0)? Intra_mbAddrA_window2:0;
|
PE2_in0 <= (blk4x4_intra_calculate_counter != 0)? Intra_mbAddrA_window2:0;
|
PE2_in1 <= 0; PE2_in2 <= 0; PE2_in3 <= 0;
|
PE2_in1 <= 0; PE2_in2 <= 0; PE2_in3 <= 0;
|
PE2_IsShift <= 0; PE2_IsStore <= 0; PE2_IsClip <= 0;
|
PE2_IsShift <= 0; PE2_IsStore <= 0; PE2_IsClip <= 0;
|
PE2_full_bypass <= 1; PE2_round_value <= 0; PE2_shift_len <= 0;
|
PE2_full_bypass <= 1; PE2_round_value <= 0; PE2_shift_len <= 0;
|
end
|
end
|
`Intra16x16_DC: //---DC---
|
`Intra16x16_DC: //---DC---
|
if (blk4x4_rec_counter == 0)
|
if (blk4x4_rec_counter == 0)
|
case (blk4x4_intra_calculate_counter)
|
case (blk4x4_intra_calculate_counter)
|
4:begin // I2 + J2 + K2 + L2
|
4:begin // I2 + J2 + K2 + L2
|
PE2_in0 <= (mbAddrA_availability == 0)? 0:Intra_mbAddrA_reg8;
|
PE2_in0 <= (mbAddrA_availability == 0)? 0:Intra_mbAddrA_reg8;
|
PE2_in1 <= (mbAddrA_availability == 0)? 0:Intra_mbAddrA_reg9;
|
PE2_in1 <= (mbAddrA_availability == 0)? 0:Intra_mbAddrA_reg9;
|
PE2_in2 <= (mbAddrA_availability == 0)? 0:Intra_mbAddrA_reg10;
|
PE2_in2 <= (mbAddrA_availability == 0)? 0:Intra_mbAddrA_reg10;
|
PE2_in3 <= (mbAddrA_availability == 0)? 0:Intra_mbAddrA_reg11;
|
PE2_in3 <= (mbAddrA_availability == 0)? 0:Intra_mbAddrA_reg11;
|
PE2_IsShift <= 0; PE2_IsStore <= 1; PE2_IsClip <= 0;
|
PE2_IsShift <= 0; PE2_IsStore <= 1; PE2_IsClip <= 0;
|
PE2_full_bypass <= 0; PE2_round_value <= 0; PE2_shift_len <= 0; end
|
PE2_full_bypass <= 0; PE2_round_value <= 0; PE2_shift_len <= 0; end
|
3:begin // PE2 output + J1 + K1 + L1
|
3:begin // PE2 output + J1 + K1 + L1
|
PE2_in0 <= PE2_out_reg;
|
PE2_in0 <= PE2_out_reg;
|
PE2_in1 <= (mbAddrB_availability == 0)? 0:Intra_mbAddrB_reg9;
|
PE2_in1 <= (mbAddrB_availability == 0)? 0:Intra_mbAddrB_reg9;
|
PE2_in2 <= (mbAddrB_availability == 0)? 0:Intra_mbAddrB_reg10;
|
PE2_in2 <= (mbAddrB_availability == 0)? 0:Intra_mbAddrB_reg10;
|
PE2_in3 <= (mbAddrB_availability == 0)? 0:Intra_mbAddrB_reg11;
|
PE2_in3 <= (mbAddrB_availability == 0)? 0:Intra_mbAddrB_reg11;
|
PE2_IsShift <= 0; PE2_IsStore <= 1; PE2_IsClip <= 0;
|
PE2_IsShift <= 0; PE2_IsStore <= 1; PE2_IsClip <= 0;
|
PE2_full_bypass <= 0; PE2_round_value <= 0; PE2_shift_len <= 0; end
|
PE2_full_bypass <= 0; PE2_round_value <= 0; PE2_shift_len <= 0; end
|
default:begin
|
default:begin
|
PE2_in0 <= 0; PE2_in1 <= 0; PE2_in2 <= 0; PE2_in3 <= 0;
|
PE2_in0 <= 0; PE2_in1 <= 0; PE2_in2 <= 0; PE2_in3 <= 0;
|
PE2_IsShift <= 0; PE2_IsStore <= 0; PE2_IsClip <= 0;
|
PE2_IsShift <= 0; PE2_IsStore <= 0; PE2_IsClip <= 0;
|
PE2_full_bypass <= 0; PE2_round_value <= 0; PE2_shift_len <= 0; end
|
PE2_full_bypass <= 0; PE2_round_value <= 0; PE2_shift_len <= 0; end
|
endcase
|
endcase
|
else
|
else
|
begin
|
begin
|
PE2_in0 <= 0; PE2_in1 <= 0; PE2_in2 <= 0; PE2_in3 <= 0;
|
PE2_in0 <= 0; PE2_in1 <= 0; PE2_in2 <= 0; PE2_in3 <= 0;
|
PE2_IsShift <= 0; PE2_IsStore <= 0; PE2_IsClip <= 0;
|
PE2_IsShift <= 0; PE2_IsStore <= 0; PE2_IsClip <= 0;
|
PE2_full_bypass <= 0; PE2_round_value <= 0; PE2_shift_len <= 0;
|
PE2_full_bypass <= 0; PE2_round_value <= 0; PE2_shift_len <= 0;
|
end
|
end
|
`Intra16x16_Plane: //---plane---
|
`Intra16x16_Plane: //---plane---
|
begin
|
begin
|
if (blk4x4_intra_calculate_counter != 0)
|
if (blk4x4_intra_calculate_counter != 0)
|
//blk0,2,4,6,8,10,12,14,calc counter == 3'b100:PE2_in0 <= seed;
|
//blk0,2,4,6,8,10,12,14,calc counter == 3'b100:PE2_in0 <= seed;
|
//other cases :PE2_in0 <= left pixel output
|
//other cases :PE2_in0 <= left pixel output
|
PE2_in0 <= (blk4x4_intra_calculate_counter == 4 && blk4x4_rec_counter[0] == 1'b0)?
|
PE2_in0 <= (blk4x4_intra_calculate_counter == 4 && blk4x4_rec_counter[0] == 1'b0)?
|
seed:PE2_out_reg;
|
seed:PE2_out_reg;
|
else
|
else
|
PE2_in0 <= 0;
|
PE2_in0 <= 0;
|
if (blk4x4_intra_calculate_counter != 0)
|
if (blk4x4_intra_calculate_counter != 0)
|
//blk0,2,8,10,calc counter == 3'b100:PE2_in1 <= c_ext x 2
|
//blk0,2,8,10,calc counter == 3'b100:PE2_in1 <= c_ext x 2
|
//other cases :PE2_in1 <= b_ext
|
//other cases :PE2_in1 <= b_ext
|
PE2_in1 <= (blk4x4_intra_calculate_counter == 4 && !blk4x4_rec_counter[2] && !blk4x4_rec_counter[0])?
|
PE2_in1 <= (blk4x4_intra_calculate_counter == 4 && !blk4x4_rec_counter[2] && !blk4x4_rec_counter[0])?
|
{c_ext[14:0],1'b0}:b_ext;
|
{c_ext[14:0],1'b0}:b_ext;
|
else
|
else
|
PE2_in1 <= 0;
|
PE2_in1 <= 0;
|
//blk0,2, 8,10,calc counter == 3'b100:PE2_in2 <= c_ext;
|
//blk0,2, 8,10,calc counter == 3'b100:PE2_in2 <= c_ext;
|
//blk4,6,12,14,calc counter == 3'b100:PE2_in2 <= c_ext x 2;
|
//blk4,6,12,14,calc counter == 3'b100:PE2_in2 <= c_ext x 2;
|
//other cases :PE2_in2 <= 0
|
//other cases :PE2_in2 <= 0
|
if (blk4x4_intra_calculate_counter == 3'b100 && !blk4x4_rec_counter[0])
|
if (blk4x4_intra_calculate_counter == 3'b100 && !blk4x4_rec_counter[0])
|
PE2_in2 <= (blk4x4_rec_counter[2])? {c_ext[14:0],1'b0}:c_ext;
|
PE2_in2 <= (blk4x4_rec_counter[2])? {c_ext[14:0],1'b0}:c_ext;
|
else
|
else
|
PE2_in2 <= 0;
|
PE2_in2 <= 0;
|
PE2_in3 <= 0;
|
PE2_in3 <= 0;
|
PE2_IsShift <= 1'b0;
|
PE2_IsShift <= 1'b0;
|
PE2_IsStore <= (blk4x4_intra_calculate_counter != 0)? 1'b1:1'b0;
|
PE2_IsStore <= (blk4x4_intra_calculate_counter != 0)? 1'b1:1'b0;
|
PE2_IsClip <= (blk4x4_intra_calculate_counter != 0)? 1'b1:1'b0;
|
PE2_IsClip <= (blk4x4_intra_calculate_counter != 0)? 1'b1:1'b0;
|
PE2_full_bypass <= 1'b0;
|
PE2_full_bypass <= 1'b0;
|
PE2_round_value <= (blk4x4_intra_calculate_counter != 0)? 5'd16:5'd0;
|
PE2_round_value <= (blk4x4_intra_calculate_counter != 0)? 5'd16:5'd0;
|
PE2_shift_len <= (blk4x4_intra_calculate_counter != 0)? 3'd5 :3'd0;
|
PE2_shift_len <= (blk4x4_intra_calculate_counter != 0)? 3'd5 :3'd0;
|
end
|
end
|
endcase
|
endcase
|
//Chroma
|
//Chroma
|
else if (mb_type_general[3] == 1'b1 && blk4x4_rec_counter > 15)
|
else if (mb_type_general[3] == 1'b1 && blk4x4_rec_counter > 15)
|
case (Intra_chroma_predmode)
|
case (Intra_chroma_predmode)
|
//--------------------
|
//--------------------
|
//no PE2 for Chroma DC
|
//no PE2 for Chroma DC
|
//2'b00:
|
//2'b00:
|
//--------------------
|
//--------------------
|
`Intra_chroma_Horizontal: //---horizontal---
|
`Intra_chroma_Horizontal: //---horizontal---
|
begin
|
begin
|
PE2_in0 <= (blk4x4_intra_calculate_counter != 0)? Intra_mbAddrA_window2:0;
|
PE2_in0 <= (blk4x4_intra_calculate_counter != 0)? Intra_mbAddrA_window2:0;
|
PE2_in1 <= 0; PE2_in2 <= 0; PE2_in3 <= 0;
|
PE2_in1 <= 0; PE2_in2 <= 0; PE2_in3 <= 0;
|
PE2_IsShift <= 0; PE2_IsStore <= 0; PE2_IsClip <= 0;
|
PE2_IsShift <= 0; PE2_IsStore <= 0; PE2_IsClip <= 0;
|
PE2_full_bypass <= 1; PE2_round_value <= 0; PE2_shift_len <= 0;
|
PE2_full_bypass <= 1; PE2_round_value <= 0; PE2_shift_len <= 0;
|
end
|
end
|
`Intra_chroma_Vertical: //---vertical---
|
`Intra_chroma_Vertical: //---vertical---
|
begin
|
begin
|
case (blk4x4_intra_calculate_counter)
|
case (blk4x4_intra_calculate_counter)
|
4:PE2_in0 <= Intra_mbAddrB_window0;
|
4:PE2_in0 <= Intra_mbAddrB_window0;
|
3:PE2_in0 <= Intra_mbAddrB_window1;
|
3:PE2_in0 <= Intra_mbAddrB_window1;
|
2:PE2_in0 <= Intra_mbAddrB_window2;
|
2:PE2_in0 <= Intra_mbAddrB_window2;
|
1:PE2_in0 <= Intra_mbAddrB_window3;
|
1:PE2_in0 <= Intra_mbAddrB_window3;
|
default:PE2_in0 <= 0;
|
default:PE2_in0 <= 0;
|
endcase
|
endcase
|
PE2_in1 <= 0; PE2_in2 <= 0; PE2_in3 <= 0;
|
PE2_in1 <= 0; PE2_in2 <= 0; PE2_in3 <= 0;
|
PE2_IsShift <= 0; PE2_IsStore <= 0; PE2_IsClip <= 0;
|
PE2_IsShift <= 0; PE2_IsStore <= 0; PE2_IsClip <= 0;
|
PE2_full_bypass <= 1; PE2_round_value <= 0; PE2_shift_len <= 0;
|
PE2_full_bypass <= 1; PE2_round_value <= 0; PE2_shift_len <= 0;
|
end
|
end
|
`Intra_chroma_Plane: //---plane---
|
`Intra_chroma_Plane: //---plane---
|
begin
|
begin
|
if (blk4x4_intra_calculate_counter != 0)
|
if (blk4x4_intra_calculate_counter != 0)
|
//need seed, blk4x4 = 16 | 18 | 20 | 22
|
//need seed, blk4x4 = 16 | 18 | 20 | 22
|
//do not need seed,blk4x4 = 17 | 19 | 21 | 23
|
//do not need seed,blk4x4 = 17 | 19 | 21 | 23
|
PE2_in0 <= (blk4x4_rec_counter[0] == 1'b0 && blk4x4_intra_calculate_counter == 4)?
|
PE2_in0 <= (blk4x4_rec_counter[0] == 1'b0 && blk4x4_intra_calculate_counter == 4)?
|
seed:PE2_out_reg;
|
seed:PE2_out_reg;
|
else
|
else
|
PE2_in0 <= 0;
|
PE2_in0 <= 0;
|
if (blk4x4_intra_calculate_counter != 0)
|
if (blk4x4_intra_calculate_counter != 0)
|
PE2_in1 <= (blk4x4_rec_counter[0] == 1'b0 && blk4x4_intra_calculate_counter == 4)?
|
PE2_in1 <= (blk4x4_rec_counter[0] == 1'b0 && blk4x4_intra_calculate_counter == 4)?
|
c_ext:b_ext;
|
c_ext:b_ext;
|
else
|
else
|
PE2_in1 <= 0;
|
PE2_in1 <= 0;
|
PE2_in2 <= (blk4x4_rec_counter[0] == 1'b0 && blk4x4_intra_calculate_counter == 4)?
|
PE2_in2 <= (blk4x4_rec_counter[0] == 1'b0 && blk4x4_intra_calculate_counter == 4)?
|
c_ext:0;
|
c_ext:0;
|
PE2_in3 <= 0;
|
PE2_in3 <= 0;
|
PE2_IsShift <= (blk4x4_rec_counter[0] == 1'b0 && blk4x4_intra_calculate_counter == 4)?
|
PE2_IsShift <= (blk4x4_rec_counter[0] == 1'b0 && blk4x4_intra_calculate_counter == 4)?
|
1'b1:1'b0;
|
1'b1:1'b0;
|
PE2_IsStore <= (blk4x4_intra_calculate_counter != 0)? 1'b1:1'b0;
|
PE2_IsStore <= (blk4x4_intra_calculate_counter != 0)? 1'b1:1'b0;
|
PE2_IsClip <= (blk4x4_intra_calculate_counter != 0)? 1'b1:1'b0;
|
PE2_IsClip <= (blk4x4_intra_calculate_counter != 0)? 1'b1:1'b0;
|
PE2_full_bypass <= 1'b0;
|
PE2_full_bypass <= 1'b0;
|
PE2_round_value <= (blk4x4_intra_calculate_counter != 0)? 5'd16:5'd0;
|
PE2_round_value <= (blk4x4_intra_calculate_counter != 0)? 5'd16:5'd0;
|
PE2_shift_len <= (blk4x4_intra_calculate_counter != 0)? 3'd5 :3'd0;
|
PE2_shift_len <= (blk4x4_intra_calculate_counter != 0)? 3'd5 :3'd0;
|
end
|
end
|
default:
|
default:
|
begin
|
begin
|
PE2_in0 <= 0; PE2_in1 <= 0; PE2_in2 <= 0; PE2_in3 <= 0;
|
PE2_in0 <= 0; PE2_in1 <= 0; PE2_in2 <= 0; PE2_in3 <= 0;
|
PE2_IsShift <= 0; PE2_IsStore <= 0; PE2_IsClip <= 0;
|
PE2_IsShift <= 0; PE2_IsStore <= 0; PE2_IsClip <= 0;
|
PE2_full_bypass <= 0; PE2_round_value <= 0; PE2_shift_len <= 0;
|
PE2_full_bypass <= 0; PE2_round_value <= 0; PE2_shift_len <= 0;
|
end
|
end
|
endcase
|
endcase
|
else
|
else
|
begin
|
begin
|
PE2_in0 <= 0; PE2_in1 <= 0; PE2_in2 <= 0; PE2_in3 <= 0;
|
PE2_in0 <= 0; PE2_in1 <= 0; PE2_in2 <= 0; PE2_in3 <= 0;
|
PE2_IsShift <= 0; PE2_IsStore <= 0; PE2_IsClip <= 0;
|
PE2_IsShift <= 0; PE2_IsStore <= 0; PE2_IsClip <= 0;
|
PE2_full_bypass <= 0; PE2_round_value <= 0; PE2_shift_len <= 0;
|
PE2_full_bypass <= 0; PE2_round_value <= 0; PE2_shift_len <= 0;
|
end
|
end
|
|
|
//----
|
//----
|
//PE3 |
|
//PE3 |
|
//----
|
//----
|
always @ (mb_type_general or blk4x4_rec_counter or blk4x4_intra_calculate_counter
|
always @ (mb_type_general or blk4x4_rec_counter or blk4x4_intra_calculate_counter
|
or Intra4x4_predmode or Intra16x16_predmode or Intra_chroma_predmode
|
or Intra4x4_predmode or Intra16x16_predmode or Intra_chroma_predmode
|
or mbAddrA_availability or mbAddrB_availability
|
or mbAddrA_availability or mbAddrB_availability
|
or Intra_mbAddrA_window0 or Intra_mbAddrA_window1 or Intra_mbAddrA_window2 or Intra_mbAddrA_window3
|
or Intra_mbAddrA_window0 or Intra_mbAddrA_window1 or Intra_mbAddrA_window2 or Intra_mbAddrA_window3
|
or Intra_mbAddrB_window0 or Intra_mbAddrB_window1 or Intra_mbAddrB_window2 or Intra_mbAddrB_window3
|
or Intra_mbAddrB_window0 or Intra_mbAddrB_window1 or Intra_mbAddrB_window2 or Intra_mbAddrB_window3
|
or Intra_mbAddrC_window0 or Intra_mbAddrC_window1 or Intra_mbAddrC_window2 or Intra_mbAddrC_window3
|
or Intra_mbAddrC_window0 or Intra_mbAddrC_window1 or Intra_mbAddrC_window2 or Intra_mbAddrC_window3
|
|
|
or Intra_mbAddrA_reg12 or Intra_mbAddrA_reg13 or Intra_mbAddrA_reg14 or Intra_mbAddrA_reg15
|
or Intra_mbAddrA_reg12 or Intra_mbAddrA_reg13 or Intra_mbAddrA_reg14 or Intra_mbAddrA_reg15
|
or Intra_mbAddrB_reg13 or Intra_mbAddrB_reg14 or Intra_mbAddrB_reg15
|
or Intra_mbAddrB_reg13 or Intra_mbAddrB_reg14 or Intra_mbAddrB_reg15
|
or blk4x4_pred_output0 or blk4x4_pred_output4 or blk4x4_pred_output5
|
or blk4x4_pred_output0 or blk4x4_pred_output4 or blk4x4_pred_output5
|
or blk4x4_pred_output6 or blk4x4_pred_output8 or blk4x4_pred_output9
|
or blk4x4_pred_output6 or blk4x4_pred_output8 or blk4x4_pred_output9
|
or PE3_out_reg
|
or PE3_out_reg
|
|
|
or seed or b_ext or c_ext)
|
or seed or b_ext or c_ext)
|
//Intra 4x4
|
//Intra 4x4
|
if (mb_type_general[3:2] == 2'b11 && blk4x4_rec_counter < 16)
|
if (mb_type_general[3:2] == 2'b11 && blk4x4_rec_counter < 16)
|
case (Intra4x4_predmode)
|
case (Intra4x4_predmode)
|
`Intra4x4_Vertical: //---Vertical---
|
`Intra4x4_Vertical: //---Vertical---
|
begin
|
begin
|
case (blk4x4_intra_calculate_counter)
|
case (blk4x4_intra_calculate_counter)
|
4:PE3_in0 <= Intra_mbAddrB_window0;
|
4:PE3_in0 <= Intra_mbAddrB_window0;
|
3:PE3_in0 <= Intra_mbAddrB_window1;
|
3:PE3_in0 <= Intra_mbAddrB_window1;
|
2:PE3_in0 <= Intra_mbAddrB_window2;
|
2:PE3_in0 <= Intra_mbAddrB_window2;
|
1:PE3_in0 <= Intra_mbAddrB_window3;
|
1:PE3_in0 <= Intra_mbAddrB_window3;
|
default:PE3_in0 <= 0;
|
default:PE3_in0 <= 0;
|
endcase
|
endcase
|
PE3_in1 <= 0; PE3_in2 <= 0; PE3_in3 <= 0;
|
PE3_in1 <= 0; PE3_in2 <= 0; PE3_in3 <= 0;
|
PE3_IsShift <= 0; PE3_IsStore <= 0; PE3_IsClip <= 0;
|
PE3_IsShift <= 0; PE3_IsStore <= 0; PE3_IsClip <= 0;
|
PE3_full_bypass <= 1; PE3_round_value <= 0; PE3_shift_len <= 0;
|
PE3_full_bypass <= 1; PE3_round_value <= 0; PE3_shift_len <= 0;
|
end
|
end
|
`Intra4x4_Horizontal: //---Horizontal---
|
`Intra4x4_Horizontal: //---Horizontal---
|
begin
|
begin
|
PE3_in0 <= (blk4x4_intra_calculate_counter != 0)? Intra_mbAddrA_window3:0;
|
PE3_in0 <= (blk4x4_intra_calculate_counter != 0)? Intra_mbAddrA_window3:0;
|
PE3_in1 <= 0; PE3_in2 <= 0; PE3_in3 <= 0;
|
PE3_in1 <= 0; PE3_in2 <= 0; PE3_in3 <= 0;
|
PE3_IsShift <= 0; PE3_IsStore <= 0; PE3_IsClip <= 0;
|
PE3_IsShift <= 0; PE3_IsStore <= 0; PE3_IsClip <= 0;
|
PE3_full_bypass <= 1; PE3_round_value <= 0; PE3_shift_len <= 0;
|
PE3_full_bypass <= 1; PE3_round_value <= 0; PE3_shift_len <= 0;
|
end
|
end
|
//-------------
|
//-------------
|
//no PE2 for DC
|
//no PE2 for DC
|
//4'b0010:
|
//4'b0010:
|
//-------------
|
//-------------
|
`Intra4x4_Diagonal_Down_Left: //---diagonal down-left---
|
`Intra4x4_Diagonal_Down_Left: //---diagonal down-left---
|
begin
|
begin
|
case (blk4x4_intra_calculate_counter)
|
case (blk4x4_intra_calculate_counter)
|
4:begin PE3_in0 <= Intra_mbAddrB_window3; PE3_in1 <= Intra_mbAddrC_window1;
|
4:begin PE3_in0 <= Intra_mbAddrB_window3; PE3_in1 <= Intra_mbAddrC_window1;
|
PE3_in2 <= Intra_mbAddrC_window0; end
|
PE3_in2 <= Intra_mbAddrC_window0; end
|
3:begin PE3_in0 <= Intra_mbAddrC_window0; PE3_in1 <= Intra_mbAddrC_window2;
|
3:begin PE3_in0 <= Intra_mbAddrC_window0; PE3_in1 <= Intra_mbAddrC_window2;
|
PE3_in2 <= Intra_mbAddrC_window1; end
|
PE3_in2 <= Intra_mbAddrC_window1; end
|
2:begin PE3_in0 <= Intra_mbAddrC_window1; PE3_in1 <= Intra_mbAddrC_window3;
|
2:begin PE3_in0 <= Intra_mbAddrC_window1; PE3_in1 <= Intra_mbAddrC_window3;
|
PE3_in2 <= Intra_mbAddrC_window2; end
|
PE3_in2 <= Intra_mbAddrC_window2; end
|
1:begin PE3_in0 <= Intra_mbAddrC_window2; PE3_in1 <= Intra_mbAddrC_window3;
|
1:begin PE3_in0 <= Intra_mbAddrC_window2; PE3_in1 <= Intra_mbAddrC_window3;
|
PE3_in2 <= Intra_mbAddrC_window3; end
|
PE3_in2 <= Intra_mbAddrC_window3; end
|
default:begin PE3_in0 <= 0;PE3_in1 <= 0;PE3_in2 <= 0; end
|
default:begin PE3_in0 <= 0;PE3_in1 <= 0;PE3_in2 <= 0; end
|
endcase
|
endcase
|
PE3_in3 <= 0;
|
PE3_in3 <= 0;
|
PE3_IsShift <= (blk4x4_intra_calculate_counter == 0)? 1'b0:1'b1;
|
PE3_IsShift <= (blk4x4_intra_calculate_counter == 0)? 1'b0:1'b1;
|
PE3_IsStore <= 1'b0; PE3_IsClip <= 1'b0; PE3_full_bypass <= 1'b0;
|
PE3_IsStore <= 1'b0; PE3_IsClip <= 1'b0; PE3_full_bypass <= 1'b0;
|
PE3_round_value <= (blk4x4_intra_calculate_counter == 0)? 5'd0:5'd2; // +2
|
PE3_round_value <= (blk4x4_intra_calculate_counter == 0)? 5'd0:5'd2; // +2
|
PE3_shift_len <= (blk4x4_intra_calculate_counter == 0)? 3'd0:3'd2; // >>2
|
PE3_shift_len <= (blk4x4_intra_calculate_counter == 0)? 3'd0:3'd2; // >>2
|
end
|
end
|
`Intra4x4_Diagonal_Down_Right: //---diagonal down-right---
|
`Intra4x4_Diagonal_Down_Right: //---diagonal down-right---
|
begin
|
begin
|
case (blk4x4_intra_calculate_counter)
|
case (blk4x4_intra_calculate_counter)
|
4:PE3_in0 <= Intra_mbAddrA_window1;
|
4:PE3_in0 <= Intra_mbAddrA_window1;
|
3:PE3_in0 <= blk4x4_pred_output8;
|
3:PE3_in0 <= blk4x4_pred_output8;
|
2:PE3_in0 <= blk4x4_pred_output4;
|
2:PE3_in0 <= blk4x4_pred_output4;
|
1:PE3_in0 <= blk4x4_pred_output0;
|
1:PE3_in0 <= blk4x4_pred_output0;
|
default:PE3_in0 <= 0;
|
default:PE3_in0 <= 0;
|
endcase
|
endcase
|
PE3_in1 <= (blk4x4_intra_calculate_counter == 4)? Intra_mbAddrA_window3:0;
|
PE3_in1 <= (blk4x4_intra_calculate_counter == 4)? Intra_mbAddrA_window3:0;
|
PE3_in2 <= (blk4x4_intra_calculate_counter == 4)? Intra_mbAddrA_window2:0;
|
PE3_in2 <= (blk4x4_intra_calculate_counter == 4)? Intra_mbAddrA_window2:0;
|
PE3_in3 <= 0;
|
PE3_in3 <= 0;
|
PE3_IsShift <= (blk4x4_intra_calculate_counter == 0)? 1'b0:1'b1;
|
PE3_IsShift <= (blk4x4_intra_calculate_counter == 0)? 1'b0:1'b1;
|
PE3_IsStore <= 1'b0; PE3_IsClip <= 1'b0;
|
PE3_IsStore <= 1'b0; PE3_IsClip <= 1'b0;
|
PE3_full_bypass <= (blk4x4_intra_calculate_counter == 4)? 1'b0:1'b1;
|
PE3_full_bypass <= (blk4x4_intra_calculate_counter == 4)? 1'b0:1'b1;
|
PE3_round_value <= (blk4x4_intra_calculate_counter == 0)? 5'd0:5'd2; // +2
|
PE3_round_value <= (blk4x4_intra_calculate_counter == 0)? 5'd0:5'd2; // +2
|
PE3_shift_len <= (blk4x4_intra_calculate_counter == 0)? 3'd0:3'd2; // >>2
|
PE3_shift_len <= (blk4x4_intra_calculate_counter == 0)? 3'd0:3'd2; // >>2
|
end
|
end
|
`Intra4x4_Vertical_Right: //---vertical right---
|
`Intra4x4_Vertical_Right: //---vertical right---
|
begin
|
begin
|
case (blk4x4_intra_calculate_counter)
|
case (blk4x4_intra_calculate_counter)
|
4:PE3_in0 <= Intra_mbAddrA_window0;
|
4:PE3_in0 <= Intra_mbAddrA_window0;
|
3:PE3_in0 <= blk4x4_pred_output4;
|
3:PE3_in0 <= blk4x4_pred_output4;
|
2:PE3_in0 <= blk4x4_pred_output5;
|
2:PE3_in0 <= blk4x4_pred_output5;
|
1:PE3_in0 <= blk4x4_pred_output6;
|
1:PE3_in0 <= blk4x4_pred_output6;
|
default:PE3_in0 <= 0;
|
default:PE3_in0 <= 0;
|
endcase
|
endcase
|
PE3_in1 <= (blk4x4_intra_calculate_counter == 4)? Intra_mbAddrA_window2:0;
|
PE3_in1 <= (blk4x4_intra_calculate_counter == 4)? Intra_mbAddrA_window2:0;
|
PE3_in2 <= (blk4x4_intra_calculate_counter == 4)? Intra_mbAddrA_window1:0;
|
PE3_in2 <= (blk4x4_intra_calculate_counter == 4)? Intra_mbAddrA_window1:0;
|
PE3_in3 <= 0;
|
PE3_in3 <= 0;
|
PE3_IsShift <= (blk4x4_intra_calculate_counter == 0)? 1'b0:1'b1;
|
PE3_IsShift <= (blk4x4_intra_calculate_counter == 0)? 1'b0:1'b1;
|
PE3_IsStore <= 1'b0; PE3_IsClip <= 1'b0;
|
PE3_IsStore <= 1'b0; PE3_IsClip <= 1'b0;
|
PE3_full_bypass <= (blk4x4_intra_calculate_counter == 4)? 1'b0:1'b1;
|
PE3_full_bypass <= (blk4x4_intra_calculate_counter == 4)? 1'b0:1'b1;
|
PE3_round_value <= (blk4x4_intra_calculate_counter == 0)? 5'd0:5'd2; // +2
|
PE3_round_value <= (blk4x4_intra_calculate_counter == 0)? 5'd0:5'd2; // +2
|
PE3_shift_len <= (blk4x4_intra_calculate_counter == 0)? 3'd0:3'd2; // >>2
|
PE3_shift_len <= (blk4x4_intra_calculate_counter == 0)? 3'd0:3'd2; // >>2
|
end
|
end
|
`Intra4x4_Horizontal_Down: //---horizontal down---
|
`Intra4x4_Horizontal_Down: //---horizontal down---
|
begin
|
begin
|
case (blk4x4_intra_calculate_counter)
|
case (blk4x4_intra_calculate_counter)
|
4:PE3_in0 <= Intra_mbAddrA_window2;
|
4:PE3_in0 <= Intra_mbAddrA_window2;
|
3:PE3_in0 <= Intra_mbAddrA_window1;
|
3:PE3_in0 <= Intra_mbAddrA_window1;
|
2:PE3_in0 <= blk4x4_pred_output8;
|
2:PE3_in0 <= blk4x4_pred_output8;
|
1:PE3_in0 <= blk4x4_pred_output9;
|
1:PE3_in0 <= blk4x4_pred_output9;
|
default:PE3_in0 <= 0;
|
default:PE3_in0 <= 0;
|
endcase
|
endcase
|
PE3_in1 <= (blk4x4_intra_calculate_counter == 4 || blk4x4_intra_calculate_counter == 3)?
|
PE3_in1 <= (blk4x4_intra_calculate_counter == 4 || blk4x4_intra_calculate_counter == 3)?
|
Intra_mbAddrA_window3:0;
|
Intra_mbAddrA_window3:0;
|
PE3_in2 <= (blk4x4_intra_calculate_counter == 3)? Intra_mbAddrA_window2:0;
|
PE3_in2 <= (blk4x4_intra_calculate_counter == 3)? Intra_mbAddrA_window2:0;
|
PE3_in3 <= 0;
|
PE3_in3 <= 0;
|
PE3_IsShift <= (blk4x4_intra_calculate_counter == 3)? 1'b1:1'b0;
|
PE3_IsShift <= (blk4x4_intra_calculate_counter == 3)? 1'b1:1'b0;
|
PE3_IsStore <= 1'b0; PE3_IsClip <= 1'b0;
|
PE3_IsStore <= 1'b0; PE3_IsClip <= 1'b0;
|
PE3_full_bypass <= (blk4x4_intra_calculate_counter == 2 ||
|
PE3_full_bypass <= (blk4x4_intra_calculate_counter == 2 ||
|
blk4x4_intra_calculate_counter == 1)? 1'b1:1'b0;
|
blk4x4_intra_calculate_counter == 1)? 1'b1:1'b0;
|
PE3_round_value <= (blk4x4_intra_calculate_counter == 4)? 5'd1:
|
PE3_round_value <= (blk4x4_intra_calculate_counter == 4)? 5'd1:
|
(blk4x4_intra_calculate_counter == 3)? 5'd2:5'd0;
|
(blk4x4_intra_calculate_counter == 3)? 5'd2:5'd0;
|
PE3_shift_len <= (blk4x4_intra_calculate_counter == 4)? 3'd1:
|
PE3_shift_len <= (blk4x4_intra_calculate_counter == 4)? 3'd1:
|
(blk4x4_intra_calculate_counter == 3)? 3'd2:3'd0;
|
(blk4x4_intra_calculate_counter == 3)? 3'd2:3'd0;
|
end
|
end
|
`Intra4x4_Vertical_Left: //---vertical left---
|
`Intra4x4_Vertical_Left: //---vertical left---
|
begin
|
begin
|
case (blk4x4_intra_calculate_counter)
|
case (blk4x4_intra_calculate_counter)
|
4:begin PE3_in0 <= Intra_mbAddrB_window1; PE3_in1 <= Intra_mbAddrB_window3;
|
4:begin PE3_in0 <= Intra_mbAddrB_window1; PE3_in1 <= Intra_mbAddrB_window3;
|
PE3_in2 <= Intra_mbAddrB_window2; end
|
PE3_in2 <= Intra_mbAddrB_window2; end
|
3:begin PE3_in0 <= Intra_mbAddrB_window2; PE3_in1 <= Intra_mbAddrC_window0;
|
3:begin PE3_in0 <= Intra_mbAddrB_window2; PE3_in1 <= Intra_mbAddrC_window0;
|
PE3_in2 <= Intra_mbAddrB_window3; end
|
PE3_in2 <= Intra_mbAddrB_window3; end
|
2:begin PE3_in0 <= Intra_mbAddrB_window3; PE3_in1 <= Intra_mbAddrC_window1;
|
2:begin PE3_in0 <= Intra_mbAddrB_window3; PE3_in1 <= Intra_mbAddrC_window1;
|
PE3_in2 <= Intra_mbAddrC_window0; end
|
PE3_in2 <= Intra_mbAddrC_window0; end
|
1:begin PE3_in0 <= Intra_mbAddrC_window0; PE3_in1 <= Intra_mbAddrC_window2;
|
1:begin PE3_in0 <= Intra_mbAddrC_window0; PE3_in1 <= Intra_mbAddrC_window2;
|
PE3_in2 <= Intra_mbAddrC_window1; end
|
PE3_in2 <= Intra_mbAddrC_window1; end
|
default:begin PE3_in0 <= 0;PE3_in1 <= 0;PE3_in2 <= 0; end
|
default:begin PE3_in0 <= 0;PE3_in1 <= 0;PE3_in2 <= 0; end
|
endcase
|
endcase
|
PE3_in3 <= 0;
|
PE3_in3 <= 0;
|
PE3_IsShift <= (blk4x4_intra_calculate_counter == 0)? 1'b0:1'b1;
|
PE3_IsShift <= (blk4x4_intra_calculate_counter == 0)? 1'b0:1'b1;
|
PE3_IsStore <= 1'b0; PE3_IsClip <= 1'b0; PE3_full_bypass <= 1'b0;
|
PE3_IsStore <= 1'b0; PE3_IsClip <= 1'b0; PE3_full_bypass <= 1'b0;
|
PE3_round_value <= (blk4x4_intra_calculate_counter == 0)? 5'd0:5'd2; // +2
|
PE3_round_value <= (blk4x4_intra_calculate_counter == 0)? 5'd0:5'd2; // +2
|
PE3_shift_len <= (blk4x4_intra_calculate_counter == 0)? 3'd0:3'd2; // >>2
|
PE3_shift_len <= (blk4x4_intra_calculate_counter == 0)? 3'd0:3'd2; // >>2
|
end
|
end
|
`Intra4x4_Horizontal_Up: //---horizontal up---
|
`Intra4x4_Horizontal_Up: //---horizontal up---
|
begin
|
begin
|
PE3_in0 <= (blk4x4_intra_calculate_counter != 0)? Intra_mbAddrA_window3:0;
|
PE3_in0 <= (blk4x4_intra_calculate_counter != 0)? Intra_mbAddrA_window3:0;
|
PE3_in1 <= 0; PE3_in2 <= 0; PE3_in3 <= 0;
|
PE3_in1 <= 0; PE3_in2 <= 0; PE3_in3 <= 0;
|
PE3_IsShift <= 0; PE3_IsStore <= 0; PE3_IsClip <= 0;
|
PE3_IsShift <= 0; PE3_IsStore <= 0; PE3_IsClip <= 0;
|
PE3_full_bypass <= (blk4x4_intra_calculate_counter != 0)? 1'b1:1'b0;
|
PE3_full_bypass <= (blk4x4_intra_calculate_counter != 0)? 1'b1:1'b0;
|
PE3_round_value <= 0; PE3_shift_len <= 0;
|
PE3_round_value <= 0; PE3_shift_len <= 0;
|
end
|
end
|
default:
|
default:
|
begin
|
begin
|
PE3_in0 <= 0; PE3_in1 <= 0; PE3_in2 <= 0; PE3_in3 <= 0;
|
PE3_in0 <= 0; PE3_in1 <= 0; PE3_in2 <= 0; PE3_in3 <= 0;
|
PE3_IsShift <= 0; PE3_IsStore <= 0; PE3_IsClip <= 0;
|
PE3_IsShift <= 0; PE3_IsStore <= 0; PE3_IsClip <= 0;
|
PE3_full_bypass <= 0; PE3_round_value <= 0; PE3_shift_len <= 0;
|
PE3_full_bypass <= 0; PE3_round_value <= 0; PE3_shift_len <= 0;
|
end
|
end
|
endcase
|
endcase
|
//Intra16x16
|
//Intra16x16
|
else if (mb_type_general[3:2] == 2'b10 && blk4x4_rec_counter < 16)
|
else if (mb_type_general[3:2] == 2'b10 && blk4x4_rec_counter < 16)
|
case (Intra16x16_predmode)
|
case (Intra16x16_predmode)
|
`Intra16x16_Vertical: //---Vertical---
|
`Intra16x16_Vertical: //---Vertical---
|
begin
|
begin
|
case (blk4x4_intra_calculate_counter)
|
case (blk4x4_intra_calculate_counter)
|
4:PE3_in0 <= Intra_mbAddrB_window0;
|
4:PE3_in0 <= Intra_mbAddrB_window0;
|
3:PE3_in0 <= Intra_mbAddrB_window1;
|
3:PE3_in0 <= Intra_mbAddrB_window1;
|
2:PE3_in0 <= Intra_mbAddrB_window2;
|
2:PE3_in0 <= Intra_mbAddrB_window2;
|
1:PE3_in0 <= Intra_mbAddrB_window3;
|
1:PE3_in0 <= Intra_mbAddrB_window3;
|
default:PE3_in0 <= 0;
|
default:PE3_in0 <= 0;
|
endcase
|
endcase
|
PE3_in1 <= 0; PE3_in2 <= 0; PE3_in3 <= 0;
|
PE3_in1 <= 0; PE3_in2 <= 0; PE3_in3 <= 0;
|
PE3_IsShift <= 0; PE3_IsStore <= 0; PE3_IsClip <= 0;
|
PE3_IsShift <= 0; PE3_IsStore <= 0; PE3_IsClip <= 0;
|
PE3_full_bypass <= 1; PE3_round_value <= 0; PE3_shift_len <= 0;
|
PE3_full_bypass <= 1; PE3_round_value <= 0; PE3_shift_len <= 0;
|
end
|
end
|
`Intra16x16_Horizontal: //---Horizontal---
|
`Intra16x16_Horizontal: //---Horizontal---
|
begin
|
begin
|
PE3_in0 <= (blk4x4_intra_calculate_counter != 0)? Intra_mbAddrA_window3:0;
|
PE3_in0 <= (blk4x4_intra_calculate_counter != 0)? Intra_mbAddrA_window3:0;
|
PE3_in1 <= 0; PE3_in2 <= 0; PE3_in3 <= 0;
|
PE3_in1 <= 0; PE3_in2 <= 0; PE3_in3 <= 0;
|
PE3_IsShift <= 0; PE3_IsStore <= 0; PE3_IsClip <= 0;
|
PE3_IsShift <= 0; PE3_IsStore <= 0; PE3_IsClip <= 0;
|
PE3_full_bypass <= 1; PE3_round_value <= 0; PE3_shift_len <= 0;
|
PE3_full_bypass <= 1; PE3_round_value <= 0; PE3_shift_len <= 0;
|
end
|
end
|
`Intra16x16_DC: //---DC---
|
`Intra16x16_DC: //---DC---
|
if (blk4x4_rec_counter == 0)
|
if (blk4x4_rec_counter == 0)
|
case (blk4x4_intra_calculate_counter)
|
case (blk4x4_intra_calculate_counter)
|
4:begin // M2 + N2 + O2 + P2
|
4:begin // M2 + N2 + O2 + P2
|
PE3_in0 <= (mbAddrA_availability == 0)? 0:Intra_mbAddrA_reg12;
|
PE3_in0 <= (mbAddrA_availability == 0)? 0:Intra_mbAddrA_reg12;
|
PE3_in1 <= (mbAddrA_availability == 0)? 0:Intra_mbAddrA_reg13;
|
PE3_in1 <= (mbAddrA_availability == 0)? 0:Intra_mbAddrA_reg13;
|
PE3_in2 <= (mbAddrA_availability == 0)? 0:Intra_mbAddrA_reg14;
|
PE3_in2 <= (mbAddrA_availability == 0)? 0:Intra_mbAddrA_reg14;
|
PE3_in3 <= (mbAddrA_availability == 0)? 0:Intra_mbAddrA_reg15;
|
PE3_in3 <= (mbAddrA_availability == 0)? 0:Intra_mbAddrA_reg15;
|
PE3_IsShift <= 0; PE3_IsStore <= 1; PE3_IsClip <= 0;
|
PE3_IsShift <= 0; PE3_IsStore <= 1; PE3_IsClip <= 0;
|
PE3_full_bypass <= 0; PE3_round_value <= 0; PE3_shift_len <= 0; end
|
PE3_full_bypass <= 0; PE3_round_value <= 0; PE3_shift_len <= 0; end
|
3:begin // PE3 output + N1 + O1 + P1
|
3:begin // PE3 output + N1 + O1 + P1
|
PE3_in0 <= PE3_out_reg;
|
PE3_in0 <= PE3_out_reg;
|
PE3_in1 <= (mbAddrB_availability == 0)? 0:Intra_mbAddrB_reg13;
|
PE3_in1 <= (mbAddrB_availability == 0)? 0:Intra_mbAddrB_reg13;
|
PE3_in2 <= (mbAddrB_availability == 0)? 0:Intra_mbAddrB_reg14;
|
PE3_in2 <= (mbAddrB_availability == 0)? 0:Intra_mbAddrB_reg14;
|
PE3_in3 <= (mbAddrB_availability == 0)? 0:Intra_mbAddrB_reg15;
|
PE3_in3 <= (mbAddrB_availability == 0)? 0:Intra_mbAddrB_reg15;
|
PE3_IsShift <= 0; PE3_IsStore <= 1; PE3_IsClip <= 0;
|
PE3_IsShift <= 0; PE3_IsStore <= 1; PE3_IsClip <= 0;
|
PE3_full_bypass <= 0; PE3_round_value <= 0; PE3_shift_len <= 0; end
|
PE3_full_bypass <= 0; PE3_round_value <= 0; PE3_shift_len <= 0; end
|
default:begin
|
default:begin
|
PE3_in0 <= 0; PE3_in1 <= 0; PE3_in2 <= 0; PE3_in3 <= 0;
|
PE3_in0 <= 0; PE3_in1 <= 0; PE3_in2 <= 0; PE3_in3 <= 0;
|
PE3_IsShift <= 0; PE3_IsStore <= 0; PE3_IsClip <= 0;
|
PE3_IsShift <= 0; PE3_IsStore <= 0; PE3_IsClip <= 0;
|
PE3_full_bypass <= 0; PE3_round_value <= 0; PE3_shift_len <= 0; end
|
PE3_full_bypass <= 0; PE3_round_value <= 0; PE3_shift_len <= 0; end
|
endcase
|
endcase
|
else
|
else
|
begin
|
begin
|
PE3_in0 <= 0; PE3_in1 <= 0; PE3_in2 <= 0; PE3_in3 <= 0;
|
PE3_in0 <= 0; PE3_in1 <= 0; PE3_in2 <= 0; PE3_in3 <= 0;
|
PE3_IsShift <= 0; PE3_IsStore <= 0; PE3_IsClip <= 0;
|
PE3_IsShift <= 0; PE3_IsStore <= 0; PE3_IsClip <= 0;
|
PE3_full_bypass <= 0; PE3_round_value <= 0; PE3_shift_len <= 0;
|
PE3_full_bypass <= 0; PE3_round_value <= 0; PE3_shift_len <= 0;
|
end
|
end
|
`Intra16x16_Plane: //---plane---
|
`Intra16x16_Plane: //---plane---
|
begin
|
begin
|
if (blk4x4_intra_calculate_counter != 0)
|
if (blk4x4_intra_calculate_counter != 0)
|
//blk0,2,4,6,8,10,12,14,calc counter == 3'b100:PE3_in0 <= seed;
|
//blk0,2,4,6,8,10,12,14,calc counter == 3'b100:PE3_in0 <= seed;
|
//other cases :PE3_in0 <= left pixel output
|
//other cases :PE3_in0 <= left pixel output
|
PE3_in0 <= (blk4x4_intra_calculate_counter == 4 && blk4x4_rec_counter[0] == 1'b0)?
|
PE3_in0 <= (blk4x4_intra_calculate_counter == 4 && blk4x4_rec_counter[0] == 1'b0)?
|
seed:PE3_out_reg;
|
seed:PE3_out_reg;
|
else
|
else
|
PE3_in0 <= 0;
|
PE3_in0 <= 0;
|
if (blk4x4_intra_calculate_counter != 0)
|
if (blk4x4_intra_calculate_counter != 0)
|
//blk0,2,8,10,calc counter == 3'b100:PE3_in1 <= c_ext x 4
|
//blk0,2,8,10,calc counter == 3'b100:PE3_in1 <= c_ext x 4
|
//other cases :PE3_in1 <= b_ext
|
//other cases :PE3_in1 <= b_ext
|
PE3_in1 <= (blk4x4_intra_calculate_counter == 4 && !blk4x4_rec_counter[2] && !blk4x4_rec_counter[0])?
|
PE3_in1 <= (blk4x4_intra_calculate_counter == 4 && !blk4x4_rec_counter[2] && !blk4x4_rec_counter[0])?
|
{c_ext[13:0],2'b0}:b_ext;
|
{c_ext[13:0],2'b0}:b_ext;
|
else
|
else
|
PE3_in1 <= 0;
|
PE3_in1 <= 0;
|
//blk4,6,12,14,calc counter == 3'b100:PE3_in2 <= c_ext x 2;
|
//blk4,6,12,14,calc counter == 3'b100:PE3_in2 <= c_ext x 2;
|
//other cases :PE3_in2 <= 0
|
//other cases :PE3_in2 <= 0
|
PE3_in2 <= (blk4x4_intra_calculate_counter == 3'b100 && blk4x4_rec_counter[2] && !blk4x4_rec_counter[0])?
|
PE3_in2 <= (blk4x4_intra_calculate_counter == 3'b100 && blk4x4_rec_counter[2] && !blk4x4_rec_counter[0])?
|
{c_ext[14:0],1'b0}:0;
|
{c_ext[14:0],1'b0}:0;
|
//blk4,6,12,14,calc counter == 3'b100:PE3_in3 <= c_ext;
|
//blk4,6,12,14,calc counter == 3'b100:PE3_in3 <= c_ext;
|
//other cases :PE3_in3 <= 0
|
//other cases :PE3_in3 <= 0
|
PE3_in3 <= (blk4x4_intra_calculate_counter == 3'b100 && blk4x4_rec_counter[2] && !blk4x4_rec_counter[0])?
|
PE3_in3 <= (blk4x4_intra_calculate_counter == 3'b100 && blk4x4_rec_counter[2] && !blk4x4_rec_counter[0])?
|
c_ext:0;
|
c_ext:0;
|
PE3_IsShift <= 1'b0;
|
PE3_IsShift <= 1'b0;
|
PE3_IsStore <= (blk4x4_intra_calculate_counter != 0)? 1'b1:1'b0;
|
PE3_IsStore <= (blk4x4_intra_calculate_counter != 0)? 1'b1:1'b0;
|
PE3_IsClip <= (blk4x4_intra_calculate_counter != 0)? 1'b1:1'b0;
|
PE3_IsClip <= (blk4x4_intra_calculate_counter != 0)? 1'b1:1'b0;
|
PE3_full_bypass <= 1'b0;
|
PE3_full_bypass <= 1'b0;
|
PE3_round_value <= (blk4x4_intra_calculate_counter != 0)? 5'd16:5'd0;
|
PE3_round_value <= (blk4x4_intra_calculate_counter != 0)? 5'd16:5'd0;
|
PE3_shift_len <= (blk4x4_intra_calculate_counter != 0)? 3'd5 :3'd0;
|
PE3_shift_len <= (blk4x4_intra_calculate_counter != 0)? 3'd5 :3'd0;
|
end
|
end
|
endcase
|
endcase
|
//Chroma
|
//Chroma
|
else if (mb_type_general[3] == 1'b1 && blk4x4_rec_counter > 15)
|
else if (mb_type_general[3] == 1'b1 && blk4x4_rec_counter > 15)
|
case (Intra_chroma_predmode)
|
case (Intra_chroma_predmode)
|
//--------------------
|
//--------------------
|
//no PE2 for Chroma DC
|
//no PE2 for Chroma DC
|
//2'b00:
|
//2'b00:
|
//--------------------
|
//--------------------
|
`Intra_chroma_Horizontal: //---horizontal---
|
`Intra_chroma_Horizontal: //---horizontal---
|
begin
|
begin
|
PE3_in0 <= (blk4x4_intra_calculate_counter != 0)? Intra_mbAddrA_window3:0;
|
PE3_in0 <= (blk4x4_intra_calculate_counter != 0)? Intra_mbAddrA_window3:0;
|
PE3_in1 <= 0; PE3_in2 <= 0; PE3_in3 <= 0;
|
PE3_in1 <= 0; PE3_in2 <= 0; PE3_in3 <= 0;
|
PE3_IsShift <= 0; PE3_IsStore <= 0; PE3_IsClip <= 0;
|
PE3_IsShift <= 0; PE3_IsStore <= 0; PE3_IsClip <= 0;
|
PE3_full_bypass <= 1; PE3_round_value <= 0; PE3_shift_len <= 0;
|
PE3_full_bypass <= 1; PE3_round_value <= 0; PE3_shift_len <= 0;
|
end
|
end
|
`Intra_chroma_Vertical: //---vertical---
|
`Intra_chroma_Vertical: //---vertical---
|
begin
|
begin
|
case (blk4x4_intra_calculate_counter)
|
case (blk4x4_intra_calculate_counter)
|
4:PE3_in0 <= Intra_mbAddrB_window0;
|
4:PE3_in0 <= Intra_mbAddrB_window0;
|
3:PE3_in0 <= Intra_mbAddrB_window1;
|
3:PE3_in0 <= Intra_mbAddrB_window1;
|
2:PE3_in0 <= Intra_mbAddrB_window2;
|
2:PE3_in0 <= Intra_mbAddrB_window2;
|
1:PE3_in0 <= Intra_mbAddrB_window3;
|
1:PE3_in0 <= Intra_mbAddrB_window3;
|
default:PE3_in0 <= 0;
|
default:PE3_in0 <= 0;
|
endcase
|
endcase
|
PE3_in1 <= 0; PE3_in2 <= 0; PE3_in3 <= 0;
|
PE3_in1 <= 0; PE3_in2 <= 0; PE3_in3 <= 0;
|
PE3_IsShift <= 0; PE3_IsStore <= 0; PE3_IsClip <= 0;
|
PE3_IsShift <= 0; PE3_IsStore <= 0; PE3_IsClip <= 0;
|
PE3_full_bypass <= 1; PE3_round_value <= 0; PE3_shift_len <= 0;
|
PE3_full_bypass <= 1; PE3_round_value <= 0; PE3_shift_len <= 0;
|
end
|
end
|
`Intra_chroma_Plane: //---plane---
|
`Intra_chroma_Plane: //---plane---
|
begin
|
begin
|
if (blk4x4_intra_calculate_counter != 0)
|
if (blk4x4_intra_calculate_counter != 0)
|
//need seed, blk4x4 = 16 | 18 | 20 | 22
|
//need seed, blk4x4 = 16 | 18 | 20 | 22
|
//do not need seed,blk4x4 = 17 | 19 | 21 | 23
|
//do not need seed,blk4x4 = 17 | 19 | 21 | 23
|
PE3_in0 <= (blk4x4_rec_counter[0] == 1'b0 && blk4x4_intra_calculate_counter == 4)?
|
PE3_in0 <= (blk4x4_rec_counter[0] == 1'b0 && blk4x4_intra_calculate_counter == 4)?
|
seed:PE3_out_reg;
|
seed:PE3_out_reg;
|
else
|
else
|
PE3_in0 <= 0;
|
PE3_in0 <= 0;
|
if (blk4x4_intra_calculate_counter != 0)
|
if (blk4x4_intra_calculate_counter != 0)
|
PE3_in1 <= (blk4x4_rec_counter[0] == 1'b0 && blk4x4_intra_calculate_counter == 4)?
|
PE3_in1 <= (blk4x4_rec_counter[0] == 1'b0 && blk4x4_intra_calculate_counter == 4)?
|
{c_ext[14:0],1'b0}:b_ext;
|
{c_ext[14:0],1'b0}:b_ext;
|
else
|
else
|
PE3_in1 <= 0;
|
PE3_in1 <= 0;
|
PE3_in2 <= (blk4x4_rec_counter[0] == 1'b0 && blk4x4_intra_calculate_counter == 4)?
|
PE3_in2 <= (blk4x4_rec_counter[0] == 1'b0 && blk4x4_intra_calculate_counter == 4)?
|
c_ext:0;
|
c_ext:0;
|
PE3_in3 <= 0;
|
PE3_in3 <= 0;
|
PE3_IsShift <= (blk4x4_rec_counter[0] == 1'b0 && blk4x4_intra_calculate_counter == 4)?
|
PE3_IsShift <= (blk4x4_rec_counter[0] == 1'b0 && blk4x4_intra_calculate_counter == 4)?
|
1'b1:1'b0;
|
1'b1:1'b0;
|
PE3_IsStore <= (blk4x4_intra_calculate_counter != 0)? 1'b1:1'b0;
|
PE3_IsStore <= (blk4x4_intra_calculate_counter != 0)? 1'b1:1'b0;
|
PE3_IsClip <= (blk4x4_intra_calculate_counter != 0)? 1'b1:1'b0;
|
PE3_IsClip <= (blk4x4_intra_calculate_counter != 0)? 1'b1:1'b0;
|
PE3_full_bypass <= 1'b0;
|
PE3_full_bypass <= 1'b0;
|
PE3_round_value <= (blk4x4_intra_calculate_counter != 0)? 5'd16:5'd0;
|
PE3_round_value <= (blk4x4_intra_calculate_counter != 0)? 5'd16:5'd0;
|
PE3_shift_len <= (blk4x4_intra_calculate_counter != 0)? 3'd5 :3'd0;
|
PE3_shift_len <= (blk4x4_intra_calculate_counter != 0)? 3'd5 :3'd0;
|
end
|
end
|
default:
|
default:
|
begin
|
begin
|
PE3_in0 <= 0; PE3_in1 <= 0; PE3_in2 <= 0; PE3_in3 <= 0;
|
PE3_in0 <= 0; PE3_in1 <= 0; PE3_in2 <= 0; PE3_in3 <= 0;
|
PE3_IsShift <= 0; PE3_IsStore <= 0; PE3_IsClip <= 0;
|
PE3_IsShift <= 0; PE3_IsStore <= 0; PE3_IsClip <= 0;
|
PE3_full_bypass <= 0; PE3_round_value <= 0; PE3_shift_len <= 0;
|
PE3_full_bypass <= 0; PE3_round_value <= 0; PE3_shift_len <= 0;
|
end
|
end
|
endcase
|
endcase
|
else
|
else
|
begin
|
begin
|
PE3_in0 <= 0; PE3_in1 <= 0; PE3_in2 <= 0; PE3_in3 <= 0;
|
PE3_in0 <= 0; PE3_in1 <= 0; PE3_in2 <= 0; PE3_in3 <= 0;
|
PE3_IsShift <= 0; PE3_IsStore <= 0; PE3_IsClip <= 0;
|
PE3_IsShift <= 0; PE3_IsStore <= 0; PE3_IsClip <= 0;
|
PE3_full_bypass <= 0; PE3_round_value <= 0; PE3_shift_len <= 0;
|
PE3_full_bypass <= 0; PE3_round_value <= 0; PE3_shift_len <= 0;
|
end
|
end
|
endmodule
|
endmodule
|
|
|
module PE (clk,reset_n,in0,in1,in2,in3,IsShift,IsStore,IsClip,full_bypass,round_value,shift_len,
|
module PE (clk,reset_n,in0,in1,in2,in3,IsShift,IsStore,IsClip,full_bypass,round_value,shift_len,
|
PE_out_reg,PE_out,sum_out);
|
PE_out_reg,PE_out,sum_out);
|
input clk,reset_n;
|
input clk,reset_n;
|
input [15:0] in0,in1,in2,in3;
|
input [15:0] in0,in1,in2,in3;
|
input IsShift;
|
input IsShift;
|
input IsStore;
|
input IsStore;
|
input IsClip;
|
input IsClip;
|
input full_bypass;
|
input full_bypass;
|
input [4:0] round_value;
|
input [4:0] round_value;
|
input [2:0] shift_len;
|
input [2:0] shift_len;
|
|
|
|
|
output [15:0] PE_out_reg;
|
output [15:0] PE_out_reg;
|
output [7:0] PE_out;
|
output [7:0] PE_out;
|
output [15:0] sum_out;
|
output [15:0] sum_out;
|
reg [15:0] PE_out_reg;
|
reg [15:0] PE_out_reg;
|
|
|
wire [15:0] sum1;
|
wire [15:0] sum1;
|
wire [15:0] sum2;
|
wire [15:0] sum2;
|
wire [16:0] round_tmp;
|
wire [16:0] round_tmp;
|
wire [15:0] round_out;
|
wire [15:0] round_out;
|
wire [7:0] clip_out;
|
wire [7:0] clip_out;
|
|
|
assign sum1 = (full_bypass)? 0:(in0 + in1);
|
assign sum1 = (full_bypass)? 0:(in0 + in1);
|
assign sum2 = (full_bypass)? 0:((IsShift)? {in2[14:0],1'b0}:(in2 + in3));
|
assign sum2 = (full_bypass)? 0:((IsShift)? {in2[14:0],1'b0}:(in2 + in3));
|
assign sum_out = (full_bypass)? 0:(sum1 + sum2);
|
assign sum_out = (full_bypass)? 0:(sum1 + sum2);
|
|
|
always @ (posedge clk)
|
always @ (posedge clk)
|
if (reset_n == 1'b0)
|
if (reset_n == 1'b0)
|
PE_out_reg <= 0;
|
PE_out_reg <= 0;
|
else if (IsStore)
|
else if (IsStore)
|
PE_out_reg <= sum_out;
|
PE_out_reg <= sum_out;
|
|
|
assign round_tmp = sum_out + round_value;
|
assign round_tmp = sum_out + round_value;
|
assign round_out = round_tmp >> shift_len;
|
assign round_out = round_tmp >> shift_len;
|
assign clip_out = (IsClip)? ((round_out[15] == 1'b1)? 8'd0:((round_out[15:8] == 0)? round_out[7:0]:8'd255))
|
assign clip_out = (IsClip)? ((round_out[15] == 1'b1)? 8'd0:((round_out[15:8] == 0)? round_out[7:0]:8'd255))
|
:round_out[7:0];
|
:round_out[7:0];
|
assign PE_out = (full_bypass)? in0[7:0]:clip_out;
|
assign PE_out = (full_bypass)? in0[7:0]:clip_out;
|
|
|
