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[/] [onewire/] [trunk/] [HDL/] [ow_search.vhd] - Diff between revs 2 and 4

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Line 61... Line 61...
-- Architecture declaration
-- Architecture declaration
-------------------------------------------------------------------------------------
-------------------------------------------------------------------------------------
architecture rtl of ow_search is
architecture rtl of ow_search is
 
 
 
 
  type   h_state_type is (H_IDLE, H_RST, H_SKIP, H_READBIT, H_READCMP, H_PARSE, H_INCLOOP, H_FILL, H_ERROR);
  type   h_state_type is (H_IDLE, H_RST, H_WRCMD, H_READBIT, H_READCMP, H_PARSE, H_INCLOOP, H_FILL, H_ERROR);
  signal h_state : h_state_type := H_IDLE;
  signal h_state : h_state_type := H_IDLE;
  type   f_state_type is (F_IDLE, F_FIND, F_INC);
  type   f_state_type is (F_IDLE, F_FIND, F_INC);
  signal f_state : f_state_type := F_IDLE;
  signal f_state : f_state_type := F_IDLE;
 
 
  signal idcnt : integer range 0 to 31;
  signal idcnt : integer range 0 to 31;
  signal lastfork : integer range 0 to 63;
  signal lastfork : integer range 0 to 64;
  signal lastzero : integer range 0 to 63;
  signal zerofork : integer range 0 to 64;
  signal idbitnum : integer range 0 to 63;
  signal idbitnum : integer range 0 to 63;
        signal lastdev  : std_logic := '0';
        signal lastdev  : std_logic := '0';
        signal h_err    : std_logic := '0';
        signal h_err    : std_logic := '0';
        signal f_err    : std_logic := '0';
        signal f_err    : std_logic := '0';
        signal irdbit   : std_logic := '0';
        signal irdbit   : std_logic := '0';
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  attribute mark_debug : string;
  attribute mark_debug : string;
  attribute mark_debug of f_state : signal is "true";
  attribute mark_debug of f_state : signal is "true";
  attribute mark_debug of h_state : signal is "true";
  attribute mark_debug of h_state : signal is "true";
        attribute mark_debug of idbitnum  : signal is "true";
        attribute mark_debug of idbitnum  : signal is "true";
  attribute mark_debug of lastfork  : signal is "true";
  attribute mark_debug of lastfork  : signal is "true";
  attribute mark_debug of lastzero  : signal is "true";
  attribute mark_debug of zerofork  : signal is "true";
  attribute mark_debug of rxpat     : signal is "true";
  attribute mark_debug of rxpat     : signal is "true";
  attribute mark_debug of iwrbyte   : signal is "true";
  attribute mark_debug of iwrbyte   : signal is "true";
  attribute mark_debug of irdbit    : signal is "true";
  attribute mark_debug of irdbit    : signal is "true";
  attribute mark_debug of iwrbit    : signal is "true";
  attribute mark_debug of iwrbit    : signal is "true";
  attribute mark_debug of iwe       : signal is "true";
  attribute mark_debug of iwe       : signal is "true";
Line 112... Line 112...
  ------------------------------------------------------
  ------------------------------------------------------
  --    HUNT - search for the next device on bus     ---
  --    HUNT - search for the next device on bus     ---
  ------------------------------------------------------
  ------------------------------------------------------
  --p_hunt - hunts for the next device using the algorithm described in Maxim (Analog Devices) app note APP187
  --p_hunt - hunts for the next device using the algorithm described in Maxim (Analog Devices) app note APP187
        -- the app note is modified slightly for optimization in VHDL
        -- the app note is modified slightly for optimization in VHDL
        -- "restart" resets all parameters to rediscover all ROM iDs
        -- the algorithm works by taking successive passes through the address field with each pass revealing the next device
        -- "hunt" searches for the next ROM ID in the sort order
        --  address in alphabetic order. The first pass takes the 0 path at each conflicting address bit (or fork). By keeping
 
        --  track of the last conflicting bit in variable zerofork/lastfork, the algorithm knows were to deviate from the
 
        --  present address on the next pass. On subsequent passes, for all conflicts up to the lastfork,
 
        --  the same fork is taken as was taken on the previous pass, which could be a 1 or 0. At the fork at the lastfork,
 
        --  the 1 path is taken, because the 0 path was taken in the previous pass. The variable zerofork is used to keep track
 
        --  of the last fork for this pass at which a zero path was taken, and lastfork is the zerofork from the previous pass.
 
        --  zerofork and lastfork are set to 64 if there are no zero forks taken.
 
        --  If no zero forks were taken, then the last device was found and the lastdev is set, afterwhich the FILL state
 
        --  is used to zero out the remaining unused ID memeory locations 
 
        -- 
  p_hunt : process (clk)
  p_hunt : process (clk)
  begin
  begin
    if rising_edge(clk) then
    if rising_edge(clk) then
      if srst = '1' or restart = '1' then
      if srst = '1' or restart = '1' then
 
        --Start a new search, put all signals into default state, and start in H_IDLE state
        h_state <= H_IDLE;
        h_state <= H_IDLE;
        idbitnum  <= 0;
        idbitnum  <= 0;
                                lastfork <= 0;
                                lastfork <= 64;
 
                                zerofork <= 64;
                                lastdev <= '0';
                                lastdev <= '0';
                                rxpat   <= "00";
                                rxpat   <= "00";
                                h_err <= '0';
                                h_err <= '0';
                                iwrbyte <= '0';
                                iwrbyte <= '0';
                                izzbit <= '0';
                                izzbit <= '0';
Line 134... Line 145...
                                iobit <= '0';
                                iobit <= '0';
                          obyte <= x"00";
                          obyte <= x"00";
      else
      else
        case h_state is
        case h_state is
                                        when H_IDLE =>
                                        when H_IDLE =>
 
                                                --when in idle, all signals in default state
                                                idbitnum  <= 0;
                                                idbitnum  <= 0;
                                          lastzero <= 0;
                                          zerofork <= 64;
                                          rxpat   <= "00";
                                          rxpat   <= "00";
                                          iwrbyte <= '0';
                                          iwrbyte <= '0';
                                          irdbit <= '0';
                                          irdbit <= '0';
                                          iwrbit <= '0';
                                          iwrbit <= '0';
                              iwe <= '0';
                              iwe <= '0';
            iobit <= '0';
            iobit <= '0';
            obyte <= x"00";
            obyte <= x"00";
                                                if h_start = '1' then
                                                if h_start = '1' then
 
                                                  --detected command to search for next onewire device
                                                  if lastdev = '0' then
                                                  if lastdev = '0' then
 
                --first time thorough, reset the one-wire bus
                h_state <= H_RST;
                h_state <= H_RST;
                izzbit <= '1';
                izzbit <= '1';  --send reset signal
                h_err <= '0';
                h_err <= '0';
              else
              else
                h_state <= H_FILL;
                h_state <= H_FILL;
                iwe <= '1';
                iwe <= '1';
                iobit <= '0';
                iobit <= '0';
              end if;
              end if;
            else
            else
              izzbit <= '0';
              izzbit <= '0';
                                                end if;
                                                end if;
                                        when H_RST =>
                                        when H_RST =>
 
                                                --reset the bus at start of each pass, all devices are activated
                                                if izzbit = '1' then
                                                if izzbit = '1' then
                                                        izzbit <= '0';
                                                        izzbit <= '0';  --terminate the reset request
                                                elsif busyin = '0' then
                                                elsif busyin = '0' then
 
                                                  --reset is completed, the devices should have responded
                                                        if ibit = '1' then
                                                        if ibit = '1' then
 
                                                          --no response, no devices on bus, so error out
                                                                h_state <= H_ERROR;
                                                                h_state <= H_ERROR;
                                                        else
                                                        else
 
                --send "search rom" command
                                                                obyte <= x"f0";
                                                                obyte <= x"f0";
                                                                iwrbyte <= '1';
                                                                iwrbyte <= '1';
                                                                h_state <= H_SKIP;
                                                                h_state <= H_WRCMD;
                                                        end if;
                                                        end if;
                                                end if;
                                                end if;
                                        when H_SKIP =>
                                        when H_WRCMD =>
 
                                                --waits for end write command byte, then reads a response bit
                                                if iwrbyte = '1' then
                                                if iwrbyte = '1' then
                                                        iwrbyte <= '0';
                                                        iwrbyte <= '0';  --terminate write "search rom" command request
                                                elsif busyin = '0' then
                                                elsif busyin = '0' then
 
                                                  -- when the write command is completed
 
              -- read a bit, this will be the AND of the 
 
              -- first address bit of all devices on the bus
                                                        irdbit <= '1';
                                                        irdbit <= '1';
                                                        h_state <= H_READBIT;
                                                        h_state <= H_READBIT;
                                                end if;
                                                end if;
                                        when H_READBIT =>
                                        when H_READBIT =>
 
                                          --reads the address bit
                                                if irdbit = '1' then
                                                if irdbit = '1' then
                                                        irdbit <= '0';
                                                        irdbit <= '0';  --terminate the read bit request
                                                elsif busyin = '0' then
                                                elsif busyin = '0' then
 
                                                        --wait until bit is read
 
                                                        --save the AND of the address bit of all devices
                                                        rxpat(1) <= ibit;
                                                        rxpat(1) <= ibit;
 
              --and read the AND of the compliment of the address bit of all devices
                                                        irdbit <= '1';
                                                        irdbit <= '1';
                                            h_state <= H_READCMP;
                                            h_state <= H_READCMP;
                                                end if;
                                                end if;
                                        when H_READCMP =>
                                        when H_READCMP =>
 
                                          --reads the complement of the address bit
                                                if irdbit = '1' then
                                                if irdbit = '1' then
                                                        irdbit <= '0';
                                                        irdbit <= '0'; --terminate the read complement bit request
                                                elsif busyin = '0' then
                                                elsif busyin = '0' then
 
              --when bit is read,
 
              --save the AND of the complimented address bit of all devices
                                                        rxpat(0) <= ibit;
                                                        rxpat(0) <= ibit;
                                                        h_state <= H_PARSE;
                                                        h_state <= H_PARSE;
                                                end if;
                                                end if;
                                        when H_PARSE =>
                                        when H_PARSE =>
 
            --with the AND of the address bit and the AND of the complimented address bit
 
            --  decide how to proceed (see APP note)
                                                case rxpat is
                                                case rxpat is
                                                        when "11" =>
                                                        when "11" =>
 
                --no device responded
                                                                h_state <= H_ERROR;
                                                                h_state <= H_ERROR;
                                                        when "00" =>
                                                        when "00" =>
 
                --00 indicates a conflict, devices disagree on this bit
                                                                if idbitnum = lastfork then
                                                                if idbitnum = lastfork then
                                                                        --last_romid(63 downto 0) <= last_romid(0) & last_romid(63 downto 1);
                                                                        --last_romid(63 downto 0) <= last_romid(0) & last_romid(63 downto 1);
                                                                        --new_romid(63 downto 0) <= '1' & new_romid(63 downto 1);
                                                                        --new_romid(63 downto 0) <= '1' & new_romid(63 downto 1);
                                                                        iobit <= '1';
                                                                        iobit <= '1';
                                                        iwrbit <= '1';
                                                        iwrbit <= '1';
Line 208... Line 241...
                                                                        --last_romid(63 downto 0) <= last_romid(0) & last_romid(63 downto 1);
                                                                        --last_romid(63 downto 0) <= last_romid(0) & last_romid(63 downto 1);
                                                                        --new_romid(63 downto 0) <= '0' & new_romid(63 downto 1);
                                                                        --new_romid(63 downto 0) <= '0' & new_romid(63 downto 1);
                  iobit <= '0';
                  iobit <= '0';
                                                                        iwrbit <= '1';
                                                                        iwrbit <= '1';
                              iwe <= '1';
                              iwe <= '1';
                                                                        lastzero <= idbitnum;
                                                                        zerofork <= idbitnum;
                                                                        h_state <= H_INCLOOP;
                                                                        h_state <= H_INCLOOP;
                                                                else
                                                                else
                                                                        --last_romid(63 downto 0) <= last_romid(0) & last_romid(63 downto 1);
                                                                        --last_romid(63 downto 0) <= last_romid(0) & last_romid(63 downto 1);
                                                                        --new_romid(63 downto 0) <= last_romid(0) & new_romid(63 downto 1);
                                                                        --new_romid(63 downto 0) <= last_romid(0) & new_romid(63 downto 1);
                                                                        iobit <= id_rbit;
                                                                        iobit <= id_rbit;
                                                                        iwrbit <= '1';
                                                                        iwrbit <= '1';
                              iwe <= '1';
                              iwe <= '1';
                                                                        if id_rbit = '0' then
                                                                        if id_rbit = '0' then
                                                                                lastzero <= idbitnum;
                                                                                zerofork <= idbitnum;
                                                                        end if;
                                                                        end if;
                                                                        h_state <= H_INCLOOP;
                                                                        h_state <= H_INCLOOP;
                                                                end if;
                                                                end if;
                                                        when others =>
                                                        when others =>
                                                                --last_romid(63 downto 0) <= last_romid(0) & last_romid(63 downto 1);
                                                                --last_romid(63 downto 0) <= last_romid(0) & last_romid(63 downto 1);
Line 230... Line 263...
                                                                iwrbit <= '1';
                                                                iwrbit <= '1';
                            iwe <= '1';
                            iwe <= '1';
                                                                h_state <= H_INCLOOP;
                                                                h_state <= H_INCLOOP;
                                                end case;
                                                end case;
                                        when H_INCLOOP =>
                                        when H_INCLOOP =>
 
                                          --increments the search to the next bit and terminates when all bits are finished
                                                if iwrbit = '1' or iwe = '1' then
                                                if iwrbit = '1' or iwe = '1' then
 
                                                  --terminate the write request of the current bit
                                                  iwrbit <= '0';
                                                  iwrbit <= '0';
                          iwe <= '0';
                          iwe <= '0';
                                                elsif busyin = '0' then
                                                elsif busyin = '0' then
                                                        if idbitnum = 63 then
                                                        if idbitnum = 63 then
 
                                                          --at end of the address, go back to idle, and move lastzero to lastfork
                                                                h_state <= H_IDLE;
                                                                h_state <= H_IDLE;
                                                                lastfork <= lastzero;
                                                                lastfork <= zerofork;
                                                                if lastzero = 0 then
                                                                if zerofork = 64 then
                                                                        lastdev <= '1';
                                                                        lastdev <= '1'; --make last device if there no zero forks were taken
                                                                end if;
                                                                end if;
                                                        else
                                                        else
 
                                                          -- continue on with next bit by requesting a read of the next address bit
                                                                idbitnum <= idbitnum + 1;
                                                                idbitnum <= idbitnum + 1;
                                                                irdbit <= '1';
                                                                irdbit <= '1';
                                                                h_state <= H_READBIT;
                                                                h_state <= H_READBIT;
                                                        end if;
                                                        end if;
                                                end if;
                                                end if;
                                        when H_FILL =>
                                        when H_FILL =>
 
                                          --this fills the unused address feilds with zeros after the last device is found.
            if iwe = '1' then
            if iwe = '1' then
              iwe <= '0';
              iwe <= '0';
            elsif idbitnum = 63 then
            elsif idbitnum = 63 then
              h_state <= H_IDLE;
              h_state <= H_IDLE;
            else
            else
Line 278... Line 316...
        begin
        begin
          if rising_edge(clk) then
          if rising_edge(clk) then
                  if srst = '1' then
                  if srst = '1' then
                          idcnt <= 0;
                          idcnt <= 0;
                                f_state <= F_IDLE;
                                f_state <= F_IDLE;
 
                    h_start <= '0';
                                restart <= '0';
                                restart <= '0';
 
                                f_err <= '0';
                        else
                        else
                          case f_state is
                          case f_state is
                                  when F_IDLE =>
                                  when F_IDLE =>
                                          if start = '1' then
                                          if start = '1' then
                                                  restart <= '1';
                                                  restart <= '1';
Line 292... Line 332...
                                                        f_state <= F_FIND;
                                                        f_state <= F_FIND;
                                                        idcnt <= 0;
                                                        idcnt <= 0;
                                                        f_err <= '0';
                                                        f_err <= '0';
                                                end if;
                                                end if;
                                        when F_FIND =>
                                        when F_FIND =>
 
                                          --terminate the h_start and wait for hunt state to finish
                                          if h_start = '1' then
                                          if h_start = '1' then
                                                  h_start <= '0';
                                                  h_start <= '0';
                                                elsif h_busy = '0' then
                                                elsif h_busy = '0' then
 
                                                  --hunt is finished, go to inc state if no error
 
              --error also indicates there are no more one-wire devices
                                                  if h_err = '1' then
                                                  if h_err = '1' then
                                                          f_state <= F_IDLE;
                                                          f_state <= F_IDLE;
                                                                f_err <= '1';
                                                                f_err <= '1';
                                                        else
                                                        else
                                                                f_state <= F_INC;
                                                                f_state <= F_INC;

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