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[/] [open8_urisc/] [trunk/] [VHDL/] [async_ser_tx.vhd] - Diff between revs 220 and 294
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| Rev 220 |
Rev 294 |
| Line 33... |
Line 33... |
--
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--
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-- Revision History
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-- Revision History
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-- Author Date Change
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-- Author Date Change
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------------------ -------- ---------------------------------------------------
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------------------ -------- ---------------------------------------------------
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-- Seth Henry 04/14/20 Code cleanup and revision section added
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-- Seth Henry 04/14/20 Code cleanup and revision section added
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-- Seth Henry 09/13/21 Fixed inverted parity bit
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library ieee;
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library ieee;
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use ieee.std_logic_1164.all;
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use ieee.std_logic_1164.all;
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use ieee.std_logic_unsigned.all;
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use ieee.std_logic_unsigned.all;
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use ieee.std_logic_arith.all;
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use ieee.std_logic_arith.all;
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| Line 146... |
Line 147... |
Tx_Out <= '1';
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Tx_Out <= '1';
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case( Tx_State )is
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case( Tx_State )is
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when IO_IDLE =>
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when IO_IDLE =>
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if( Enable_Parity )then
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if( Enable_Parity )then
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Tx_Parity <= Parity_Odd_Even_n;
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Tx_Parity <= not Parity_Odd_Even_n;
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end if;
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end if;
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when IO_STRT =>
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when IO_STRT =>
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Tx_Out <= '0';
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Tx_Out <= '0';
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