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[/] [open8_urisc/] [trunk/] [VHDL/] [o8_7seg.vhd] - Diff between revs 257 and 284
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Rev 284 |
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-- LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
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-- LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
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-- ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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-- ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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-- (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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-- (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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-- THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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-- THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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--
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--
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-- VHDL Units : o8_register
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-- VHDL Units : o8_7seg
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-- Description: Provides a single addressible 8-bit output register
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-- Description: Drives up to two 7-segment displays in either common cathode
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-- : or common anode mode with per-display PWM brightness.
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--
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--
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-- Register Map:
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-- Register Map:
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-- Offset Bitfield Description Read/Write
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-- Offset Bitfield Description Read/Write
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-- 0x00 ---AAAAA Display 1 value (RW)
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-- 0x00 ---AAAAA Display 1 value (RW)
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-- 0x01 ---AAAAA Display 2 value (RW)
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-- 0x01 ---AAAAA Display 2 value (RW)
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