Line 26... |
Line 26... |
-- the ST/HD44780(U) control ASIC wired in either 8-bit or
|
-- the ST/HD44780(U) control ASIC wired in either 8-bit or
|
-- reduced (4-bit) mode.
|
-- reduced (4-bit) mode.
|
-- All low-level timing of the control signals are handled by this
|
-- All low-level timing of the control signals are handled by this
|
-- module, allowing client firmware to use a simple register
|
-- module, allowing client firmware to use a simple register
|
-- interface to program the LCD panel.
|
-- interface to program the LCD panel.
|
|
-- Note that this module assumes that the R/Wn line has been tied LOW
|
--
|
--
|
-- Register Map
|
-- Register Map
|
-- Address Function
|
-- Address Function
|
-- Offset Bitfield Description Read/Write
|
-- Offset Bitfield Description Read/Write
|
-- 0x0 AAAAAAAA LCD Register Write (Read-Write*)
|
-- 0x0 AAAAAAAA LCD Register Write (Read-Write*)
|
Line 117... |
Line 118... |
Write_Qual : in std_logic := '1';
|
Write_Qual : in std_logic := '1';
|
Rd_Data : out DATA_TYPE;
|
Rd_Data : out DATA_TYPE;
|
Interrupt : out std_logic;
|
Interrupt : out std_logic;
|
--
|
--
|
LCD_E : out std_logic;
|
LCD_E : out std_logic;
|
LCD_RW : out std_logic;
|
|
LCD_RS : out std_logic;
|
LCD_RS : out std_logic;
|
LCD_DQ : out std_logic_vector(7 downto 0);
|
LCD_DQ : out std_logic_vector(7 downto 0);
|
LCD_BL : out std_logic
|
LCD_BL : out std_logic
|
);
|
);
|
end entity;
|
end entity;
|
Line 251... |
Line 251... |
|
|
--------------------------------------------------------------------------------
|
--------------------------------------------------------------------------------
|
-- LCD and Register logic
|
-- LCD and Register logic
|
--------------------------------------------------------------------------------
|
--------------------------------------------------------------------------------
|
|
|
LCD_RW <= '0'; -- Permanently wire the RW line low
|
|
|
|
LCD_Ctrl_proc: process( Clock, Reset )
|
LCD_Ctrl_proc: process( Clock, Reset )
|
begin
|
begin
|
if( Reset = Reset_Level )then
|
if( Reset = Reset_Level )then
|
ctrl_state <= INIT;
|
ctrl_state <= INIT;
|
hw_timer <= (others => '0');
|
hw_timer <= (others => '0');
|