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https://opencores.org/ocsvn/open8_urisc/open8_urisc/trunk
[/] [open8_urisc/] [trunk/] [VHDL/] [o8_version.vhd] - Diff between revs 334 and 335
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| Rev 334 |
Rev 335 |
| Line 45... |
Line 45... |
library work;
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library work;
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use work.open8_pkg.all;
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use work.open8_pkg.all;
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entity o8_version is
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entity o8_version is
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generic(
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generic(
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Minor_Version : DATA_TYPE := x"00";
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Minor_Version : integer range 0 to 255 := 0;
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Major_Version : DATA_TYPE := x"00";
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Major_Version : integer range 0 to 255 := 0;
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SoC_Version : DATA_TYPE := x"00";
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SoC_Version : integer range 0 to 255 := 0;
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Hardware_Version : DATA_TYPE := x"00";
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Hardware_Version : integer range 0 to 255 := 0;
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Address : ADDRESS_TYPE
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Address : ADDRESS_TYPE
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);
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);
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port(
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port(
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Open8_Bus : in OPEN8_BUS_TYPE;
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Open8_Bus : in OPEN8_BUS_TYPE;
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Rd_Data : out DATA_TYPE
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Rd_Data : out DATA_TYPE
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| Line 92... |
Line 92... |
Rd_En_q <= Rd_En_d;
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Rd_En_q <= Rd_En_d;
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if( Rd_En_q = '1' )then
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if( Rd_En_q = '1' )then
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case( Reg_Sel_q )is
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case( Reg_Sel_q )is
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when "00" =>
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when "00" =>
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Rd_Data <= Minor_Version;
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Rd_Data <= conv_std_logic_vector(Minor_Version,OPEN8_DATA_WIDTH);
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when "01" =>
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when "01" =>
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Rd_Data <= Major_Version;
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Rd_Data <= conv_std_logic_vector(Major_Version,OPEN8_DATA_WIDTH);
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when "10" =>
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when "10" =>
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Rd_Data <= Soc_Version;
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Rd_Data <= conv_std_logic_vector(Soc_Version,OPEN8_DATA_WIDTH);
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when "11" =>
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when "11" =>
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Rd_Data <= Hardware_Version;
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Rd_Data <= conv_std_logic_vector(Hardware_Version,OPEN8_DATA_WIDTH);
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when others =>
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when others =>
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null;
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null;
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end case;
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end case;
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end if;
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end if;
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