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[/] [openarty/] [trunk/] [rtl/] [wbicapetwo.v] - Diff between revs 25 and 30

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///////////////////////////////////////////////////////////////////////////
////////////////////////////////////////////////////////////////////////////////
//
//
// Filename:    wbicapetwo.v
// Filename:    wbicapetwo.v
//
//
// Project:     Wishbone to ICAPE2 interface conversion
// Project:     Wishbone to ICAPE2 interface conversion
//
//
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//              (CS/W)  0x20000000      NOOP
//              (CS/W)  0x20000000      NOOP
//              (Idle)
//              (Idle)
// Creator:     Dan Gisselquist, Ph.D.
// Creator:     Dan Gisselquist, Ph.D.
//              Gisselquist Technology, LLC
//              Gisselquist Technology, LLC
//
//
///////////////////////////////////////////////////////////////////////////
////////////////////////////////////////////////////////////////////////////////
//
//
// Copyright (C) 2015, Gisselquist Technology, LLC
// Copyright (C) 2015-2016, Gisselquist Technology, LLC
//
//
// This program is free software (firmware): you can redistribute it and/or
// This program is free software (firmware): you can redistribute it and/or
// modify it under the terms of  the GNU General Public License as published
// modify it under the terms of  the GNU General Public License as published
// by the Free Software Foundation, either version 3 of the License, or (at
// by the Free Software Foundation, either version 3 of the License, or (at
// your option) any later version.
// your option) any later version.
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//
//
// License:     GPL, v3, as defined and found on www.gnu.org,
// License:     GPL, v3, as defined and found on www.gnu.org,
//              http://www.gnu.org/licenses/gpl.html
//              http://www.gnu.org/licenses/gpl.html
//
//
//
//
///////////////////////////////////////////////////////////////////////////
////////////////////////////////////////////////////////////////////////////////
 
//
//
//
`define MBOOT_IDLE      5'h00
`define MBOOT_IDLE      5'h00
`define MBOOT_START     5'h01
`define MBOOT_START     5'h01
`define MBOOT_READ      5'h06
`define MBOOT_READ      5'h06
`define MBOOT_WRITE     5'h0f
`define MBOOT_WRITE     5'h0f

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