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Line 30... |
//
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//
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// *Author(s):
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// *Author(s):
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// - Olivier Girard, olgirard@gmail.com
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// - Olivier Girard, olgirard@gmail.com
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//
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//
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//----------------------------------------------------------------------------
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//----------------------------------------------------------------------------
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// $Rev: 134 $
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// $Rev: 145 $
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// $LastChangedBy: olivier.girard $
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// $LastChangedBy: olivier.girard $
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// $LastChangedDate: 2012-03-22 21:31:06 +0100 (Thu, 22 Mar 2012) $
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// $LastChangedDate: 2012-05-30 23:03:05 +0200 (Wed, 30 May 2012) $
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//----------------------------------------------------------------------------
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//----------------------------------------------------------------------------
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// CPU registers
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// CPU registers
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//======================
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//======================
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Line 128... |
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// Interrupt vectors
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// Interrupt vectors
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//======================
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//======================
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wire [15:0] irq_vect_15 = pmem_0.mem[(1<<(`PMEM_MSB+1))-1]; // RESET Vector
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wire [15:0] irq_vect_15 = pmem_0.mem[(`PMEM_SIZE>>1)-1]; // RESET Vector
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wire [15:0] irq_vect_14 = pmem_0.mem[(1<<(`PMEM_MSB+1))-2]; // NMI
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wire [15:0] irq_vect_14 = pmem_0.mem[(`PMEM_SIZE>>1)-2]; // NMI
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wire [15:0] irq_vect_13 = pmem_0.mem[(1<<(`PMEM_MSB+1))-3]; // IRQ 13
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wire [15:0] irq_vect_13 = pmem_0.mem[(`PMEM_SIZE>>1)-3]; // IRQ 13
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wire [15:0] irq_vect_12 = pmem_0.mem[(1<<(`PMEM_MSB+1))-4]; // IRQ 12
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wire [15:0] irq_vect_12 = pmem_0.mem[(`PMEM_SIZE>>1)-4]; // IRQ 12
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wire [15:0] irq_vect_11 = pmem_0.mem[(1<<(`PMEM_MSB+1))-5]; // IRQ 11
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wire [15:0] irq_vect_11 = pmem_0.mem[(`PMEM_SIZE>>1)-5]; // IRQ 11
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wire [15:0] irq_vect_10 = pmem_0.mem[(1<<(`PMEM_MSB+1))-6]; // IRQ 10
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wire [15:0] irq_vect_10 = pmem_0.mem[(`PMEM_SIZE>>1)-6]; // IRQ 10
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wire [15:0] irq_vect_09 = pmem_0.mem[(1<<(`PMEM_MSB+1))-7]; // IRQ 9
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wire [15:0] irq_vect_09 = pmem_0.mem[(`PMEM_SIZE>>1)-7]; // IRQ 9
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wire [15:0] irq_vect_08 = pmem_0.mem[(1<<(`PMEM_MSB+1))-8]; // IRQ 8
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wire [15:0] irq_vect_08 = pmem_0.mem[(`PMEM_SIZE>>1)-8]; // IRQ 8
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wire [15:0] irq_vect_07 = pmem_0.mem[(1<<(`PMEM_MSB+1))-9]; // IRQ 7
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wire [15:0] irq_vect_07 = pmem_0.mem[(`PMEM_SIZE>>1)-9]; // IRQ 7
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wire [15:0] irq_vect_06 = pmem_0.mem[(1<<(`PMEM_MSB+1))-10]; // IRQ 6
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wire [15:0] irq_vect_06 = pmem_0.mem[(`PMEM_SIZE>>1)-10]; // IRQ 6
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wire [15:0] irq_vect_05 = pmem_0.mem[(1<<(`PMEM_MSB+1))-11]; // IRQ 5
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wire [15:0] irq_vect_05 = pmem_0.mem[(`PMEM_SIZE>>1)-11]; // IRQ 5
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wire [15:0] irq_vect_04 = pmem_0.mem[(1<<(`PMEM_MSB+1))-12]; // IRQ 4
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wire [15:0] irq_vect_04 = pmem_0.mem[(`PMEM_SIZE>>1)-12]; // IRQ 4
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wire [15:0] irq_vect_03 = pmem_0.mem[(1<<(`PMEM_MSB+1))-13]; // IRQ 3
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wire [15:0] irq_vect_03 = pmem_0.mem[(`PMEM_SIZE>>1)-13]; // IRQ 3
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wire [15:0] irq_vect_02 = pmem_0.mem[(1<<(`PMEM_MSB+1))-14]; // IRQ 2
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wire [15:0] irq_vect_02 = pmem_0.mem[(`PMEM_SIZE>>1)-14]; // IRQ 2
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wire [15:0] irq_vect_01 = pmem_0.mem[(1<<(`PMEM_MSB+1))-15]; // IRQ 1
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wire [15:0] irq_vect_01 = pmem_0.mem[(`PMEM_SIZE>>1)-15]; // IRQ 1
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wire [15:0] irq_vect_00 = pmem_0.mem[(1<<(`PMEM_MSB+1))-16]; // IRQ 0
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wire [15:0] irq_vect_00 = pmem_0.mem[(`PMEM_SIZE>>1)-16]; // IRQ 0
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// Interrupt detection
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// Interrupt detection
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wire nmi_detect = dut.frontend_0.nmi_pnd;
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wire nmi_detect = dut.frontend_0.nmi_pnd;
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wire irq_detect = dut.frontend_0.irq_detect;
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wire irq_detect = dut.frontend_0.irq_detect;
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