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[/] [openmsp430/] [trunk/] [core/] [sim/] [rtl_sim/] [bin/] [msp430sim] - Diff between revs 200 and 202

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Rev 200 Rev 202
Line 27... Line 27...
#
#
# Author(s):
# Author(s):
#             - Olivier Girard,    olgirard@gmail.com
#             - Olivier Girard,    olgirard@gmail.com
#
#
#------------------------------------------------------------------------------
#------------------------------------------------------------------------------
# $Rev: 200 $
# $Rev: 202 $
# $LastChangedBy: olivier.girard $
# $LastChangedBy: olivier.girard $
# $LastChangedDate: 2015-01-21 23:01:31 +0100 (Wed, 21 Jan 2015) $
# $LastChangedDate: 2015-07-01 23:13:32 +0200 (Wed, 01 Jul 2015) $
#------------------------------------------------------------------------------
#------------------------------------------------------------------------------
 
 
###############################################################################
###############################################################################
 
#                            Parse arguments                                  #
 
###############################################################################
 
testname=""
 
seed=""
 
dma_verif="DMA_VERIF"
 
while [[ $# > 0 ]]; do
 
    key="$1"
 
    shift
 
    case $key in
 
        -seed)
 
            seed="$1"
 
            shift
 
            ;;
 
        -no_dma)
 
            dma_verif="NO_DMA_VERIF"
 
            ;;
 
        *)
 
            testname="$key"
 
            ;;
 
    esac
 
done
 
 
 
###############################################################################
#                            Parameter Check                                  #
#                            Parameter Check                                  #
###############################################################################
###############################################################################
EXPECTED_ARGS=1
if [ "$testname" == "" ]; then
if [ $# -ne $EXPECTED_ARGS ]; then
  echo "ERROR    : missing argument"
  echo "ERROR    : wrong number of arguments"
  echo "USAGE    : msp430sim  [-seed ] [-no_dma]"
  echo "USAGE    : msp430sim "
 
  echo "Example  : msp430sim c-jump_jge"
  echo "Example  : msp430sim c-jump_jge"
  echo ""
  echo ""
  echo "In order to switch the verilog simulator, the OMSP_SIMULATOR environment"
  echo "In order to switch the verilog simulator, the OMSP_SIMULATOR environment"
  echo "variable can be set to the following values:"
  echo "variable can be set to the following values:"
  echo ""
  echo ""
Line 55... Line 77...
  echo "                  - isim      : Xilinx simulator"
  echo "                  - isim      : Xilinx simulator"
  echo ""
  echo ""
  exit 1
  exit 1
fi
fi
 
 
 
# Generate random seed if not specified
 
if [ "$seed" == "" ]; then
 
    seed=`od -A n -t d -N 4 /dev/urandom`
 
fi
 
 
###############################################################################
###############################################################################
#                     Check if the required files exist                       #
#                     Check if the required files exist                       #
###############################################################################
###############################################################################
asmfile=../src/$1.s43;
asmfile=../src/$testname.s43;
verfile=../src/$1.v;
verfile=../src/$testname.v;
incfile=../../../rtl/verilog/openMSP430_defines.v;
incfile=../../../rtl/verilog/openMSP430_defines.v;
linkfile=../bin/template.x;
linkfile=../bin/template.x;
headfile=../bin/template_defs.asm;
headfile=../bin/template_defs.asm;
submitfile=../src/submit.f;
submitfile=../src/submit.f;
if [ $OMSP_SIMULATOR == "isim" ]; then
if [ "$OMSP_SIMULATOR" == "isim" ]; then
    submitfile=../src/submit.prj;
    submitfile=../src/submit.prj;
fi
fi
 
 
if [ ! -e $asmfile ]; then
if [ ! -e $asmfile ]; then
    echo "Assembler file $asmfile doesn't exist: $asmfile"
    echo "Assembler file $asmfile doesn't exist: $asmfile"
Line 107... Line 133...
 
 
###############################################################################
###############################################################################
#                              Run simulation                                 #
#                              Run simulation                                 #
###############################################################################
###############################################################################
echo " ======================================================="
echo " ======================================================="
echo "| Start simulation:             $1"
echo "| Start simulation:             $testname"
echo " ======================================================="
echo " ======================================================="
 
echo ""
 
echo " Seed: $seed"
 
echo ""
 
 
# Create links
# Create links
if [ `uname -o` = "Cygwin" ]
if [ `uname -o` = "Cygwin" ]
then
then
    cp $asmfile pmem.s43
    cp $asmfile pmem.s43
Line 133... Line 162...
sed -i 's/`//g'              ./pmem.h
sed -i 's/`//g'              ./pmem.h
sed -i "s/'//g"              ./pmem.h
sed -i "s/'//g"              ./pmem.h
 
 
# Use MSPGCC preprocessor to extract the Program, Data
# Use MSPGCC preprocessor to extract the Program, Data
# and Peripheral memory sizes
# and Peripheral memory sizes
if which msp430-elf-gcc >/dev/null; then
if command -v msp430-elf-gcc >/dev/null; then
    msp430-elf-gcc -E -P -x c ../bin/omsp_config.sh > pmem.sh
    msp430-elf-gcc -E -P -x c ../bin/omsp_config.sh > pmem.sh
else
else
    msp430-gcc     -E -P -x c ../bin/omsp_config.sh > pmem.sh
    msp430-gcc     -E -P -x c ../bin/omsp_config.sh > pmem.sh
fi
fi
 
 
Line 152... Line 181...
echo "Convert IHEX file to Verilog MEMH format..."
echo "Convert IHEX file to Verilog MEMH format..."
../bin/ihex2mem.tcl -ihex pmem.ihex -out pmem.mem -mem_size $pmemsize
../bin/ihex2mem.tcl -ihex pmem.ihex -out pmem.mem -mem_size $pmemsize
 
 
# Start verilog simulation
# Start verilog simulation
echo "Start Verilog simulation..."
echo "Start Verilog simulation..."
../bin/rtlsim.sh    stimulus.v pmem.mem $submitfile
../bin/rtlsim.sh    stimulus.v pmem.mem $submitfile $seed $dma_verif
../bin/rtlsim.sh    stimulus.v pmem.mem $submitfile $seed $dma_verif
../bin/rtlsim.sh    stimulus.v pmem.mem $submitfile $seed $dma_verif

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