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[/] [openmsp430/] [trunk/] [core/] [sim/] [rtl_sim/] [bin/] [rtlsim.sh] - Diff between revs 200 and 202

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Line 28... Line 28...
# Author(s):
# Author(s):
#             - Olivier Girard,    olgirard@gmail.com
#             - Olivier Girard,    olgirard@gmail.com
#             - Mihai M.,          mmihai@delajii.net
#             - Mihai M.,          mmihai@delajii.net
#
#
#------------------------------------------------------------------------------
#------------------------------------------------------------------------------
# $Rev: 200 $
# $Rev: 202 $
# $LastChangedBy: olivier.girard $
# $LastChangedBy: olivier.girard $
# $LastChangedDate: 2015-01-21 23:01:31 +0100 (Wed, 21 Jan 2015) $
# $LastChangedDate: 2015-07-01 23:13:32 +0200 (Wed, 01 Jul 2015) $
#------------------------------------------------------------------------------
#------------------------------------------------------------------------------
 
 
###############################################################################
###############################################################################
#                            Parameter Check                                  #
#                            Parameter Check                                  #
###############################################################################
###############################################################################
EXPECTED_ARGS=3
EXPECTED_ARGS=5
if [ $# -ne $EXPECTED_ARGS ]; then
if [ $# -ne $EXPECTED_ARGS ]; then
  echo "ERROR    : wrong number of arguments"
  echo "ERROR    : wrong number of arguments"
  echo "USAGE    : rtlsim.sh <verilog stimulus file> <memory file> <submit file>"
  echo "USAGE    : rtlsim.sh <verilog stimulus file> <memory file> <submit file>   <seed> <dma_verif>"
  echo "Example  : rtlsim.sh ./stimulus.v            pmem.mem      ../src/submit.f"
  echo "Example  : rtlsim.sh ./stimulus.v            pmem.mem      ../src/submit.f  123   NO_DMA_VERIF"
  echo "OMSP_SIMULATOR env keeps simulator name iverilog/cver/verilog/ncverilog/vsim/vcs"
  echo "OMSP_SIMULATOR env keeps simulator name iverilog/cver/verilog/ncverilog/vsim/vcs"
  exit 1
  exit 1
fi
fi
 
 
 
 
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    rm -rf simv
    rm -rf simv
 
 
    NODUMP=${OMSP_NODUMP-0}
    NODUMP=${OMSP_NODUMP-0}
    if [ $NODUMP -eq 1 ]
    if [ $NODUMP -eq 1 ]
      then
      then
        iverilog -o simv -c $3 -D NODUMP
        iverilog -o simv -c $3 -D SEED=$4 -D $5 -D NODUMP
      else
      else
        iverilog -o simv -c $3
        iverilog -o simv -c $3 -D SEED=$4 -D $5
    fi
    fi
 
 
if [ `uname -o` = "Cygwin" ]
if [ `uname -o` = "Cygwin" ]
then
then
        vvp.exe ./simv
        vvp.exe ./simv
Line 91... Line 91...
 
 
else
else
 
 
    NODUMP=${OMSP_NODUMP-0}
    NODUMP=${OMSP_NODUMP-0}
    if [ $NODUMP -eq 1 ] ; then
    if [ $NODUMP -eq 1 ] ; then
       vargs="+define+NODUMP"
       vargs="+define+SEED=$4 +define+$5 +define+NODUMP"
    else
    else
       vargs=""
       vargs="+define+SEED=$4 +define+$5"
    fi
    fi
 
 
   case $OMSP_SIMULATOR in
   case $OMSP_SIMULATOR in
    cver* )
    cver* )
       vargs="$vargs +define+VXL +define+CVER" ;;
       vargs="$vargs +define+VXL +define+CVER" ;;
    verilog* )
    verilog* )
       vargs="$vargs +define+VXL" ;;
       vargs="$vargs +define+VXL" ;;
    ncverilog* )
    ncverilog* )
       rm -rf INCA_libs
       rm -rf INCA_libs
       #vargs="$vargs +access+r +nclicq +ncinput+../bin/cov_ncverilog.tcl -covdut openMSP430 -covfile ../bin/cov_ncverilog.ccf -coverage all +define+TRN_FILE" ;;
       #vargs="$vargs +access+r +nclicq +ncinput+../bin/cov_ncverilog.tcl -covdut openMSP430 -covfile ../bin/cov_ncverilog.ccf -coverage all +define+TRN_FILE" ;;
       vargs="$vargs +access+r +nclicq +define+TRN_FILE" ;;
       vargs="$vargs +access+r +svseed=$4 +nclicq +define+TRN_FILE" ;;
    vcs* )
    vcs* )
       rm -rf csrc simv*
       rm -rf csrc simv*
       vargs="$vargs -R -debug_pp +vcs+lic+wait +v2k +define+VPD_FILE" ;;
       vargs="$vargs -R -debug_pp +vcs+lic+wait +v2k +define+VPD_FILE" ;;
    vsim* )
    vsim* )
       # Modelsim
       # Modelsim

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