| Line 63... |
Line 63... |
always @(posedge mclk or posedge puc_rst)
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always @(posedge mclk or posedge puc_rst)
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if (puc_rst) wkup2_sync <= 2'b00;
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if (puc_rst) wkup2_sync <= 2'b00;
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else wkup2_sync <= {wkup2_sync[0], wkup[2]};
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else wkup2_sync <= {wkup2_sync[0], wkup[2]};
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always @(wkup2_sync)
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always @(wkup2_sync)
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irq[2] = wkup2_sync[1];
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irq[`IRQ_NR-14] = wkup2_sync[1]; // IRQ-2
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// Wakeup synchronizer to generate IRQ
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// Wakeup synchronizer to generate IRQ
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reg [1:0] wkup3_sync;
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reg [1:0] wkup3_sync;
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always @(posedge mclk or posedge puc_rst)
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always @(posedge mclk or posedge puc_rst)
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if (puc_rst) wkup3_sync <= 2'b00;
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if (puc_rst) wkup3_sync <= 2'b00;
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else wkup3_sync <= {wkup3_sync[0], wkup[3]};
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else wkup3_sync <= {wkup3_sync[0], wkup[3]};
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always @(wkup3_sync)
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always @(wkup3_sync)
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irq[3] = wkup3_sync[1];
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irq[`IRQ_NR-13] = wkup3_sync[1]; // IRQ-3
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initial
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initial
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begin
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begin
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$display(" ===============================================");
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$display(" ===============================================");
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$display("| START SIMULATION |");
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$display("| START SIMULATION |");
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$display(" ===============================================");
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$display(" ===============================================");
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repeat(5) @(posedge mclk);
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repeat(5) @(posedge mclk);
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stimulus_done = 0;
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stimulus_done = 0;
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irq[2] = 0;
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irq[`IRQ_NR-14] = 0; // IRQ-2
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wkup[2] = 0;
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wkup[2] = 0;
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irq[3] = 0;
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irq[`IRQ_NR-13] = 0; // IRQ-3
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wkup[3] = 0;
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wkup[3] = 0;
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`ifdef ASIC_CLOCKING
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`ifdef ASIC_CLOCKING
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| Line 116... |
Line 116... |
smclk_cnt = 0;
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smclk_cnt = 0;
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@(r15==16'h1003); //---------- PORT2 IRQ TRIAL (EXITING POWER MODE) -------------//
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@(r15==16'h1003); //---------- PORT2 IRQ TRIAL (EXITING POWER MODE) -------------//
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wkup[3] = 1'b1;
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wkup[3] = 1'b1;
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@(posedge irq_acc[3]);
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@(posedge irq_acc[`IRQ_NR-13]); // IRQ_ACC-3
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aclk_cnt = 0;
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aclk_cnt = 0;
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repeat (10) @(posedge mclk);
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repeat (10) @(posedge mclk);
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smclk_cnt = 0;
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smclk_cnt = 0;
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repeat (50) @(posedge mclk);
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repeat (50) @(posedge mclk);
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if (smclk_cnt !== 50) tb_error("====== SCG1 TEST 3: SMCLK IS NOT RUNNING DURING IRQ =====");
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if (smclk_cnt !== 50) tb_error("====== SCG1 TEST 3: SMCLK IS NOT RUNNING DURING IRQ =====");
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| Line 147... |
Line 147... |
smclk_cnt = 0;
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smclk_cnt = 0;
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@(r15==16'h1006); //---------- PORT1 IRQ TRIAL (STAYING IN POWER MODE) -------------//
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@(r15==16'h1006); //---------- PORT1 IRQ TRIAL (STAYING IN POWER MODE) -------------//
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wkup[2] = 1'b1;
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wkup[2] = 1'b1;
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@(posedge irq_acc[2]);
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@(posedge irq_acc[`IRQ_NR-14]); // IRQ_ACC-2
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repeat (10) @(posedge mclk);
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repeat (10) @(posedge mclk);
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smclk_cnt = 0;
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smclk_cnt = 0;
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repeat (50) @(posedge mclk);
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repeat (50) @(posedge mclk);
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if (smclk_cnt !== 50) tb_error("====== SCG1 TEST 6: SMCLK IS NOT RUNNING DURING IRQ =====");
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if (smclk_cnt !== 50) tb_error("====== SCG1 TEST 6: SMCLK IS NOT RUNNING DURING IRQ =====");
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smclk_cnt = 0;
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smclk_cnt = 0;
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| Line 204... |
Line 204... |
aclk_cnt = 0;
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aclk_cnt = 0;
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@(r15==16'h2003); //---------- PORT2 IRQ TRIAL (EXITING POWER MODE) -------------//
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@(r15==16'h2003); //---------- PORT2 IRQ TRIAL (EXITING POWER MODE) -------------//
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wkup[3] = 1'b1;
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wkup[3] = 1'b1;
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@(posedge irq_acc[3]);
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@(posedge irq_acc[`IRQ_NR-13]); // IRQ_ACC-3
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repeat (100) @(posedge mclk);
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repeat (100) @(posedge mclk);
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aclk_cnt = 0;
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aclk_cnt = 0;
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repeat (100) @(posedge mclk);
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repeat (100) @(posedge mclk);
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`ifdef LFXT_DOMAIN
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`ifdef LFXT_DOMAIN
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if (aclk_cnt !== 3) tb_error("====== OSCOFF TEST 3: ACLK IS NOT RUNNING DURING IRQ =====");
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if (aclk_cnt !== 3) tb_error("====== OSCOFF TEST 3: ACLK IS NOT RUNNING DURING IRQ =====");
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| Line 243... |
Line 243... |
aclk_cnt = 0;
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aclk_cnt = 0;
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@(r15==16'h2006); //---------- PORT1 IRQ TRIAL (STAYING IN POWER MODE) -------------//
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@(r15==16'h2006); //---------- PORT1 IRQ TRIAL (STAYING IN POWER MODE) -------------//
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wkup[2] = 1'b1;
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wkup[2] = 1'b1;
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@(posedge irq_acc[2]);
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@(posedge irq_acc[`IRQ_NR-14]); // IRQ_ACC-2
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repeat (100) @(posedge mclk);
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repeat (100) @(posedge mclk);
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aclk_cnt = 0;
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aclk_cnt = 0;
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repeat (100) @(posedge mclk);
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repeat (100) @(posedge mclk);
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`ifdef LFXT_DOMAIN
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`ifdef LFXT_DOMAIN
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if (aclk_cnt !== 3) tb_error("====== OSCOFF TEST 6: ACLK IS NOT RUNNING DURING IRQ =====");
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if (aclk_cnt !== 3) tb_error("====== OSCOFF TEST 6: ACLK IS NOT RUNNING DURING IRQ =====");
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| Line 297... |
Line 297... |
repeat (80) @(negedge dco_clk);
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repeat (80) @(negedge dco_clk);
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if (mclk_cnt !== 0) tb_error("====== CPUOFF TEST 2: CPU IS NOT STOPPED =====");
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if (mclk_cnt !== 0) tb_error("====== CPUOFF TEST 2: CPU IS NOT STOPPED =====");
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@(posedge dco_clk); //---------- PORT1 IRQ TRIAL (STAYING IN POWER MODE) -------------//
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@(posedge dco_clk); //---------- PORT1 IRQ TRIAL (STAYING IN POWER MODE) -------------//
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wkup[2] = 1'b1;
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wkup[2] = 1'b1;
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@(posedge irq_acc[2]);
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@(posedge irq_acc[`IRQ_NR-14]); // IRQ_ACC-2
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repeat(10) @(negedge dco_clk);
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repeat(10) @(negedge dco_clk);
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mclk_cnt = 0;
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mclk_cnt = 0;
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repeat (80) @(negedge dco_clk);
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repeat (80) @(negedge dco_clk);
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if (mclk_cnt !== 80) tb_error("====== CPUOFF TEST 3: CPU IS NOT RUNNING DURING IRQ (PORT 1) =====");
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if (mclk_cnt !== 80) tb_error("====== CPUOFF TEST 3: CPU IS NOT RUNNING DURING IRQ (PORT 1) =====");
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mclk_cnt = 0;
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mclk_cnt = 0;
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| Line 315... |
Line 315... |
if (mclk_cnt !== 0) tb_error("====== CPUOFF TEST 4: CPU IS NOT STOPPED AFTER IRQ =====");
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if (mclk_cnt !== 0) tb_error("====== CPUOFF TEST 4: CPU IS NOT STOPPED AFTER IRQ =====");
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//---------- PORT2 IRQ TRIAL (EXITING POWER MODE) -------------//
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//---------- PORT2 IRQ TRIAL (EXITING POWER MODE) -------------//
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wkup[3] = 1'b1;
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wkup[3] = 1'b1;
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@(posedge irq_acc[3]);
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@(posedge irq_acc[`IRQ_NR-13]); // IRQ_ACC-3
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repeat (10) @(posedge dco_clk);
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repeat (10) @(posedge dco_clk);
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mclk_cnt = 0;
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mclk_cnt = 0;
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repeat (80) @(posedge dco_clk);
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repeat (80) @(posedge dco_clk);
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if (mclk_cnt !== 80) tb_error("====== CPUOFF TEST 5: CPU IS NOT RUNNING DURING IRQ =====");
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if (mclk_cnt !== 80) tb_error("====== CPUOFF TEST 5: CPU IS NOT RUNNING DURING IRQ =====");
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mclk_cnt = 0;
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mclk_cnt = 0;
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| Line 359... |
Line 359... |
if (dco_clk_cnt !== 0) tb_error("====== SCG0 TEST 2: DCO IS NOT STOPPED =====");
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if (dco_clk_cnt !== 0) tb_error("====== SCG0 TEST 2: DCO IS NOT STOPPED =====");
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#(1*50); //---------- PORT1 IRQ TRIAL (STAYING IN POWER MODE) -------------//
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#(1*50); //---------- PORT1 IRQ TRIAL (STAYING IN POWER MODE) -------------//
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wkup[2] = 1'b1;
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wkup[2] = 1'b1;
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@(posedge irq_acc[2]);
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@(posedge irq_acc[`IRQ_NR-14]); // IRQ_ACC-2
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#(10*50);
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#(10*50);
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dco_clk_cnt = 0;
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dco_clk_cnt = 0;
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#(80*50);
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#(80*50);
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if (dco_clk_cnt !== 80) tb_error("====== SCG0 TEST 3: DCO IS NOT RUNNING DURING IRQ (PORT 1) =====");
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if (dco_clk_cnt !== 80) tb_error("====== SCG0 TEST 3: DCO IS NOT RUNNING DURING IRQ (PORT 1) =====");
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dco_clk_cnt = 0;
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dco_clk_cnt = 0;
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| Line 376... |
Line 376... |
if (dco_clk_cnt !== 0) tb_error("====== SCG0 TEST 4: DCO IS NOT STOPPED AFTER IRQ =====");
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if (dco_clk_cnt !== 0) tb_error("====== SCG0 TEST 4: DCO IS NOT STOPPED AFTER IRQ =====");
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//---------- PORT2 IRQ TRIAL (EXITING POWER MODE) -------------//
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//---------- PORT2 IRQ TRIAL (EXITING POWER MODE) -------------//
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wkup[3] = 1'b1;
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wkup[3] = 1'b1;
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@(posedge irq_acc[3]);
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@(posedge irq_acc[`IRQ_NR-13]); // IRQ_ACC-3
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#(10*50);
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#(10*50);
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dco_clk_cnt = 0;
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dco_clk_cnt = 0;
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#(80*50);
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#(80*50);
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if (dco_clk_cnt !== 80) tb_error("====== SCG0 TEST 5: DCO IS NOT RUNNING DURING IRQ =====");
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if (dco_clk_cnt !== 80) tb_error("====== SCG0 TEST 5: DCO IS NOT RUNNING DURING IRQ =====");
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dco_clk_cnt = 0;
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dco_clk_cnt = 0;
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