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[/] [openmsp430/] [trunk/] [fpga/] [actel_m1a3pl_dev_kit/] [bench/] [verilog/] [tb_openMSP430_fpga.v] - Diff between revs 80 and 94

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Rev 80	Rev 94
Line 90...	Line 90...
`//------------------------------`	`//------------------------------`

`initial`	`initial`
`begin`	`begin`
`// Read memory file`	`// Read memory file`
`$readmemh("./pmem.mem", pmem);`	`#10 $readmemh("./pmem.mem", pmem);`

`// Update Actel memory banks`	`// Update Actel memory banks`
`for (i=0; i<512; i=i+1)`	`for (i=0; i<512; i=i+1)`
`begin`	`begin`
`dut.dmem_hi.dmem_128B_R0C0.MEM_512_9[i] = {1'b0, 8'h00};`	`dut.dmem_hi.dmem_128B_R0C0.MEM_512_9[i] = {1'b0, 8'h00};`

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