OpenCores
URL https://opencores.org/ocsvn/openmsp430/openmsp430/trunk

Subversion Repositories openmsp430

[/] [openmsp430/] [trunk/] [fpga/] [altera_de0_nano_soc/] [software/] [libs/] [gfx/] [gfx_controller.h] - Diff between revs 222 and 223

Show entire file | Details | Blame | View Log

Rev 222 Rev 223
Line 247... Line 247...
#define  REFRESH_FRAME2_SELECT     0x0002
#define  REFRESH_FRAME2_SELECT     0x0002
#define  REFRESH_FRAME3_SELECT     0x0003
#define  REFRESH_FRAME3_SELECT     0x0003
#define  REFRESH_FRAME_MASK        0x0003
#define  REFRESH_FRAME_MASK        0x0003
 
 
#define  VID_RAM0_FRAME0_SELECT    0x0000
#define  VID_RAM0_FRAME0_SELECT    0x0000
#define  VID_RAM0_FRAME1_SELECT    0x0010
#define  VID_RAM0_FRAME1_SELECT    0x0100
#define  VID_RAM0_FRAME2_SELECT    0x0020
#define  VID_RAM0_FRAME2_SELECT    0x0200
#define  VID_RAM0_FRAME3_SELECT    0x0030
#define  VID_RAM0_FRAME3_SELECT    0x0300
#define  VID_RAM0_FRAME_MASK       0x0030
#define  VID_RAM0_FRAME_MASK       0x0300
 
 
#define  VID_RAM1_FRAME0_SELECT    0x0000
#define  VID_RAM1_FRAME0_SELECT    0x0000
#define  VID_RAM1_FRAME1_SELECT    0x0040
#define  VID_RAM1_FRAME1_SELECT    0x1000
#define  VID_RAM1_FRAME2_SELECT    0x0080
#define  VID_RAM1_FRAME2_SELECT    0x2000
#define  VID_RAM1_FRAME3_SELECT    0x00C0
#define  VID_RAM1_FRAME3_SELECT    0x3000
#define  VID_RAM1_FRAME_MASK       0x00C0
#define  VID_RAM1_FRAME_MASK       0x3000
 
 
// VID_RAMx_CFG Register
// VID_RAMx_CFG Register
#define  VID_RAM_RMW_MODE          0x0010
#define  VID_RAM_RMW_MODE          0x0010
#define  VID_RAM_MSK_MODE          0x0020
#define  VID_RAM_MSK_MODE          0x0020
#define  VID_RAM_WIN_MODE          0x0040
#define  VID_RAM_WIN_MODE          0x0040

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.