URL https://opencores.org/ocsvn/openmsp430/openmsp430/trunk

Subversion Repositories openmsp430

[/] [openmsp430/] [trunk/] [fpga/] [xilinx_diligent_s3board/] [rtl/] [verilog/] [openmsp430/] [omsp_register_file.v] - Diff between revs 136 and 181

Rev 136	Rev 181
Line 34...	Line 34...
`//`	`//`
`// *Author(s):`	`// *Author(s):`
`// - Olivier Girard, olgirard@gmail.com`	`// - Olivier Girard, olgirard@gmail.com`
`//`	`//`
`//----------------------------------------------------------------------------`	`//----------------------------------------------------------------------------`
`// $Rev: 136 $`	`// $Rev: 181 $`
`// $LastChangedBy: olivier.girard $`	`// $LastChangedBy: olivier.girard $`
`// $LastChangedDate: 2012-03-22 22:14:16 +0100 (Thu, 22 Mar 2012) $`	`// $LastChangedDate: 2013-02-25 22:24:10 +0100 (Mon, 25 Feb 2013) $`
`//----------------------------------------------------------------------------`	`//----------------------------------------------------------------------------`
`ifdef OMSP_NO_INCLUDE	`ifdef OMSP_NO_INCLUDE
`else	`else
`include "openMSP430_defines.v"	`include "openMSP430_defines.v"
`endif	`endif
Line 207...	Line 207...


`wire mclk_r2 = mclk;`	`wire mclk_r2 = mclk;`
`endif	`endif

`ifdef ASIC	`ifdef ASIC_CLOCKING
`ifdef CPUOFF_EN	`ifdef CPUOFF_EN
`wire [15:0] cpuoff_mask = 16'h0010;`	`wire [15:0] cpuoff_mask = 16'h0010;`
`else	`else
`wire [15:0] cpuoff_mask = 16'h0000;`	`wire [15:0] cpuoff_mask = 16'h0000;`
`endif	`endif