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https://opencores.org/ocsvn/openrisc/openrisc/trunk
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| Rev 401 |
Rev 481 |
| Line 310... |
Line 310... |
wire id_macrc_op;
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wire id_macrc_op;
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wire ex_macrc_op;
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wire ex_macrc_op;
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wire [`OR1200_MACOP_WIDTH-1:0] id_mac_op;
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wire [`OR1200_MACOP_WIDTH-1:0] id_mac_op;
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wire [`OR1200_MACOP_WIDTH-1:0] mac_op;
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wire [`OR1200_MACOP_WIDTH-1:0] mac_op;
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wire [31:0] mult_mac_result;
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wire [31:0] mult_mac_result;
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wire mac_stall;
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wire mult_mac_stall;
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wire [13:0] except_trig;
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wire [13:0] except_trig;
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wire [13:0] except_stop;
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wire [13:0] except_stop;
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wire genpc_refetch;
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wire genpc_refetch;
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wire rfe;
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wire rfe;
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wire lsu_unstall;
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wire lsu_unstall;
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| Line 642... |
Line 642... |
.a(operand_a),
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.a(operand_a),
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.b(operand_b),
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.b(operand_b),
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.mac_op(mac_op),
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.mac_op(mac_op),
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.alu_op(alu_op),
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.alu_op(alu_op),
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.result(mult_mac_result),
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.result(mult_mac_result),
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.mac_stall_r(mac_stall),
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.mult_mac_stall(mult_mac_stall),
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.spr_cs(spr_cs[`OR1200_SPR_GROUP_MAC]),
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.spr_cs(spr_cs[`OR1200_SPR_GROUP_MAC]),
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.spr_write(spr_we),
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.spr_write(spr_we),
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.spr_addr(spr_addr),
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.spr_addr(spr_addr),
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.spr_dat_i(spr_dat_cpu),
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.spr_dat_i(spr_dat_cpu),
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.spr_dat_o(spr_dat_mac)
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.spr_dat_o(spr_dat_mac)
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| Line 783... |
Line 783... |
.if_stall(if_stall),
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.if_stall(if_stall),
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.lsu_unstall(lsu_unstall),
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.lsu_unstall(lsu_unstall),
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.force_dslot_fetch(force_dslot_fetch),
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.force_dslot_fetch(force_dslot_fetch),
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.abort_ex(abort_ex),
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.abort_ex(abort_ex),
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.du_stall(du_stall),
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.du_stall(du_stall),
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.mac_stall(mac_stall),
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.mac_stall(mult_mac_stall),
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.saving_if_insn(saving_if_insn),
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.saving_if_insn(saving_if_insn),
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.genpc_freeze(genpc_freeze),
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.genpc_freeze(genpc_freeze),
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.if_freeze(if_freeze),
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.if_freeze(if_freeze),
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.id_freeze(id_freeze),
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.id_freeze(id_freeze),
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.ex_freeze(ex_freeze),
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.ex_freeze(ex_freeze),
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