URL https://opencores.org/ocsvn/openrisc/openrisc/trunk

Subversion Repositories openrisc

[/] [openrisc/] [trunk/] [or1200/] [rtl/] [verilog/] [or1200_fpu.v] - Diff between revs 358 and 364

Rev 358	Rev 364
Line 141...	Line 141...
`fpu_op_r_is_comp;`	`fpu_op_r_is_comp;`
`wire fpu_arith_done, fpu_conv_done,`	`wire fpu_arith_done, fpu_conv_done,`
`fpu_comp_done;`	`fpu_comp_done;`
`wire [width-1:0] result_arith, result_conv;`	`wire [width-1:0] result_arith, result_conv;`

reg [`OR1200_FPUOP_WIDTH:0] fpu_op_r;	reg [`OR1200_FPUOP_WIDTH-1:0] fpu_op_r;
reg [`OR1200_FPCSR_WIDTH-1:0] fpcsr_r;	reg [`OR1200_FPCSR_WIDTH-1:0] fpcsr_r;
`wire fpu_op_valid;`	`wire fpu_op_valid;`
`reg fpu_op_valid_re;`	`reg fpu_op_valid_re;`
`wire fpu_check_op;`	`wire fpu_check_op;`
`wire inf, inv_inf_op_in,snan, snan_in,qnan,`	`wire inf, inv_inf_op_in,snan, snan_in,qnan,`