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[/] [openrisc/] [trunk/] [or1200/] [rtl/] [verilog/] [or1200_genpc.v] - Diff between revs 358 and 364

Rev 358	Rev 364
Line 152...	Line 152...
`//`	`//`
`always @(pcreg or ex_branch_addrtarget or flag or branch_op or except_type`	`always @(pcreg or ex_branch_addrtarget or flag or branch_op or except_type`
`or except_start or operand_b or epcr or spr_pc_we or spr_dat_i or`	`or except_start or operand_b or epcr or spr_pc_we or spr_dat_i or`
`except_prefix)`	`except_prefix)`
`begin`	`begin`
`casex ({spr_pc_we, except_start, branch_op}) // synopsys parallel_case`	`casez ({spr_pc_we, except_start, branch_op}) // synopsys parallel_case`
{2'b00, `OR1200_BRANCHOP_NOP}: begin	{2'b00, `OR1200_BRANCHOP_NOP}: begin
`pc = {pcreg + 30'd1, 2'b0};`	`pc = {pcreg + 30'd1, 2'b0};`
`ex_branch_taken = 1'b0;`	`ex_branch_taken = 1'b0;`
`end`	`end`
{2'b00, `OR1200_BRANCHOP_J}: begin	{2'b00, `OR1200_BRANCHOP_J}: begin
Line 227...	Line 227...
`// synopsys translate_on`	`// synopsys translate_on`
`endif	`endif
`pc = epcr;`	`pc = epcr;`
`ex_branch_taken = 1'b1;`	`ex_branch_taken = 1'b1;`
`end`	`end`
`{2'b01, 3'bxxx}: begin`	`{2'b01, 3'b???}: begin`
`ifdef OR1200_VERBOSE	`ifdef OR1200_VERBOSE
`// synopsys translate_off`	`// synopsys translate_off`
`$display("Starting exception: %h.", except_type);`	`$display("Starting exception: %h.", except_type);`
`// synopsys translate_on`	`// synopsys translate_on`
`endif	`endif