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| Rev 642 |
Rev 643 |
| Line 248... |
Line 248... |
`ifdef OR1200_IMPL_OV
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`ifdef OR1200_IMPL_OV
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`ifdef OR1200_MULT_IMPLEMENTED
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`ifdef OR1200_MULT_IMPLEMENTED
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`OR1200_ALUOP_MUL: begin
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`OR1200_ALUOP_MUL: begin
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// Actually doing unsigned multiply internally, and then negate on
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// Actually doing unsigned multiply internally, and then negate on
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// output as appropriate, so if sign bit is set, then is overflow
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// output as appropriate, so if sign bit is set, then is overflow
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ovforw = mul_prod_r[31];
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// unless incoming signs differ and result is 2^(width-1)
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ovforw = (mul_prod_r[width-1] &&
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!((a[width-1]^b[width-1]) && ~|mul_prod_r[width-2:0])) ||
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|mul_prod_r[2*width-1:32];
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ov_we = 1;
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ov_we = 1;
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end
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end
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`OR1200_ALUOP_MULU : begin
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`OR1200_ALUOP_MULU : begin
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// Overflow on unsigned multiply is simpler.
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// Overflow on unsigned multiply is simpler.
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ovforw = mul_prod_r[32];
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ovforw = |mul_prod_r[2*width-1:32];
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ov_we = 1;
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ov_we = 1;
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end
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end
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`endif // `ifdef OR1200_MULT_IMPLEMENTED
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`endif // `ifdef OR1200_MULT_IMPLEMENTED
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`ifdef OR1200_DIV_IMPLEMENTED
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`ifdef OR1200_DIV_IMPLEMENTED
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`OR1200_ALUOP_DIVU,
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`OR1200_ALUOP_DIVU,
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`OR1200_ALUOP_DIV: begin
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`OR1200_ALUOP_DIV: begin
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// Overflow on divide by zero
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// Overflow on divide by zero or -2^(width-1)/-1
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ovforw = div_by_zero;
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ovforw = div_by_zero || (a==32'h8000_0000 && b==32'hffff_ffff);
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ov_we = 1;
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ov_we = 1;
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end
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end
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`endif
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`endif
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`endif // `ifdef OR1200_IMPL_OV
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`endif // `ifdef OR1200_IMPL_OV
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default: begin
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default: begin
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