| Line 1... |
Line 1... |
//////////////////////////////////////////////////////////////////////
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/////////////////////////////////////////////////////////////////////
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//// ////
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//// ////
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//// ORPSoC SystemC Testbench ////
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//// ORPSoC SystemC Testbench ////
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//// ////
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//// ////
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//// Description ////
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//// Description ////
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//// ORPSoC Testbench file ////
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//// ORPSoC Testbench file ////
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//// ////
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//// ////
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//// To Do: ////
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//// To Do: ////
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//// Somehow allow tracing to begin later in the sim ////
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//// ////
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//// ////
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//// ////
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//// ////
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//// Author(s): ////
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//// Author(s): ////
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//// - Jeremy Bennett jeremy.bennett@embecosm.com ////
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//// - Jeremy Bennett jeremy.bennett@embecosm.com ////
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//// - Julius Baxter jb@orsoc.se ////
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//// - Julius Baxter jb@orsoc.se ////
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| Line 41... |
Line 40... |
//// ////
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//// ////
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//////////////////////////////////////////////////////////////////////
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//////////////////////////////////////////////////////////////////////
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#include "OrpsocMain.h"
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#include "OrpsocMain.h"
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#include "jtagsc.h"
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#include "Vorpsoc_top.h"
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#include "Vorpsoc_top.h"
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#include "OrpsocAccess.h"
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#include "OrpsocAccess.h"
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#include "MemoryLoad.h"
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#include "MemoryLoad.h"
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#include <SpTraceVcdC.h>
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#include <SpTraceVcdC.h>
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//#include "TraceSC.h"
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#include "ResetSC.h"
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#include "ResetSC.h"
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#include "Or1200MonitorSC.h"
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#include "Or1200MonitorSC.h"
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#include "GdbServerSC.h"
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#include "UartSC.h"
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#include "UartSC.h"
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int SIM_RUNNING;
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int SIM_RUNNING;
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int sc_main (int argc,
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int sc_main (int argc,
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char *argv[] )
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char *argv[] )
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{
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{
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sc_set_time_resolution( 1, TIMESCALE_UNIT);
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sc_set_time_resolution( 1, TIMESCALE_UNIT);
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// CPU clock (also used as JTAG TCK) and reset (both active high and low)
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// CPU clock (also used as JTAG TCK) and reset (both active high and low)
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sc_time clkPeriod (BENCH_CLK_HALFPERIOD * 2.0, TIMESCALE_UNIT);
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sc_time clkPeriod (BENCH_CLK_HALFPERIOD * 2.0, TIMESCALE_UNIT);
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sc_time jtagPeriod (JTAG_CLK_HALFPERIOD * 2.0, TIMESCALE_UNIT);
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sc_clock clk ("clk", clkPeriod);
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sc_clock clk ("clk", clkPeriod);
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sc_clock jtag_tck ("jtag-clk", jtagPeriod, 0.5, SC_ZERO_TIME, false);
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sc_signal<bool> rst;
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sc_signal<bool> rst;
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sc_signal<bool> rstn;
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sc_signal<bool> rstn;
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sc_signal<bool> rst_o;
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sc_signal<bool> rst_o;
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sc_signal<bool> jtag_tdi; // JTAG interface
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sc_signal<bool> jtag_tdi; // JTAG interface
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| Line 88... |
Line 92... |
sc_signal<bool> spi1_sclk;
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sc_signal<bool> spi1_sclk;
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SIM_RUNNING = 0;
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SIM_RUNNING = 0;
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// Setup the name of the VCD dump file
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// Setup the name of the VCD dump file
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int VCD_enabled = 0;
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bool VCD_enabled = false;
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string dumpNameDefault("vlt-dump.vcd");
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string dumpNameDefault("vlt-dump.vcd");
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string testNameString;
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string testNameString;
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string vcdDumpFile;
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string vcdDumpFile;
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// VCD dump controling vars
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// VCD dump controling vars
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int dump_start_delay, dump_stop_set;
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bool dump_start_delay_set = false, dump_stop_set = false;
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int dumping_now;
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bool dumping_now = false;
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int dump_depth = 99; // Default dump depth
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int dump_depth = 99; // Default dump depth
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sc_time dump_start,dump_stop, finish_time;
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sc_time dump_start,dump_stop, finish_time;
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int finish_time_set = 0; // By default we will let the simulation finish naturally
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bool finish_time_set = false; // By default we will let the simulation finish naturally
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SpTraceVcdCFile *spTraceFile;
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SpTraceVcdCFile *spTraceFile;
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int time_val;
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/*int*/double time_val;
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int cmdline_name_found=0;
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bool vcd_file_name_given = false;
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bool rsp_server_enabled = false;
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int rsp_server_port = DEFAULT_RSP_PORT;
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// Executable app load variables
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// Executable app load variables
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int do_program_file_load = 0; // Default: we don't require a file, we use the VMEM
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int do_program_file_load = 0; // Default: we don't require a file, we use the VMEM
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char* program_file; // Old char* style for program name
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char* program_file; // Old char* style for program name
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| Line 117... |
Line 124... |
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MemoryLoad *memoryload; // Memory loader
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MemoryLoad *memoryload; // Memory loader
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ResetSC *reset; // Generate a RESET signal
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ResetSC *reset; // Generate a RESET signal
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Or1200MonitorSC *monitor; // Handle l.nop x instructions
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Or1200MonitorSC *monitor; // Handle l.nop x instructions
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JtagSC *jtag; // Generate JTAG signals
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GdbServerSC *gdbServer; // Map RSP requests to debug unit
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UartSC *uart; // Handle UART signals
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UartSC *uart; // Handle UART signals
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// Instantiate the Verilator model, VCD trace handler and accessor
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// Instantiate the Verilator model, VCD trace handler and accessor
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orpsoc = new Vorpsoc_top ("orpsoc");
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orpsoc = new Vorpsoc_top ("orpsoc");
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accessor = new OrpsocAccess (orpsoc);
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accessor = new OrpsocAccess (orpsoc);
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memoryload = new MemoryLoad (accessor);
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memoryload = new MemoryLoad (accessor);
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monitor = new Or1200MonitorSC ("monitor", accessor, memoryload,
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argc, argv);
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// Instantiate the SystemC modules
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// Instantiate the SystemC modules
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reset = new ResetSC ("reset", BENCH_RESET_TIME);
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reset = new ResetSC ("reset", BENCH_RESET_TIME);
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monitor = new Or1200MonitorSC ("monitor", accessor, memoryload, argc, argv);
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jtag = new JtagSC ("jtag");
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uart = new UartSC("uart"); // TODO: Probalby some sort of param
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uart = new UartSC("uart"); // TODO: Probalby some sort of param
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// Parse command line options
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// Parse command line options
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// Default is for VCD generation OFF, only turned on if specified on command line
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// Default is for VCD generation OFF, only turned on if specified on command line
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dump_start_delay = 0;
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dump_stop_set = 0;
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dumping_now = 0;
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// Search through the command line parameters for options
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// Search through the command line parameters for options
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if (argc > 1)
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if (argc > 1)
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{
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{
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for(int i=1; i<argc; i++)
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for(int i=1; i<argc; i++)
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{
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{
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if ((strcmp(argv[i], "-d")==0) ||
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if ( (strcmp(argv[i], "-e")==0) ||
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(strcmp(argv[i], "--vcdfile")==0))
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{
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testNameString = (argv[i+1]);
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vcdDumpFile = testNameString;
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cmdline_name_found=1;
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}
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else if ((strcmp(argv[i], "-v")==0) ||
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(strcmp(argv[i], "--vcdon")==0))
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{
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dumping_now = 1;
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}
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else if ( (strcmp(argv[i], "-e")==0) ||
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(strcmp(argv[i], "--endtime")==0) )
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(strcmp(argv[i], "--endtime")==0) )
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{
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{
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time_val = atoi(argv[i+1]);
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time_val = strtod(argv[i+1], NULL);
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sc_time opt_end_time(time_val,TIMESCALE_UNIT);
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sc_time opt_end_time(time_val,TIMESCALE_UNIT);
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finish_time = opt_end_time;
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finish_time = opt_end_time;
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finish_time_set = 1;
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finish_time_set = true;
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}
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}
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else if ( (strcmp(argv[i], "-f")==0) ||
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else if ( (strcmp(argv[i], "-f")==0) ||
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(strcmp(argv[i], "--program")==0) )
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(strcmp(argv[i], "--program")==0) )
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{
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{
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do_program_file_load = 1; // Enable program loading - will be done after sim init
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do_program_file_load = 1; // Enable program loading - will be done after sim init
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program_file = argv[i+1]; // Old char* style for program name
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program_file = argv[i+1]; // Old char* style for program name
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}
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}
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else if ((strcmp(argv[i], "-d")==0) ||
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(strcmp(argv[i], "--vcdfile")==0) ||
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(strcmp(argv[i], "-v")==0) ||
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(strcmp(argv[i], "--vcdon")==0)
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)
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{
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VCD_enabled = true;
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dumping_now = true;
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vcdDumpFile = dumpNameDefault;
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if (i+1 < argc)
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if(argv[i+1][0] != '-')
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{
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testNameString = argv[i+1];
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vcdDumpFile = testNameString;
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i++;
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}
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}
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else if ( (strcmp(argv[i], "-s")==0) ||
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else if ( (strcmp(argv[i], "-s")==0) ||
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(strcmp(argv[i], "--vcdstart")==0) )
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(strcmp(argv[i], "--vcdstart")==0) )
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{
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{
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time_val = atoi(argv[i+1]);
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VCD_enabled = true;
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time_val = strtod(argv[i+1], NULL);
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sc_time dump_start_time(time_val,TIMESCALE_UNIT);
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sc_time dump_start_time(time_val,TIMESCALE_UNIT);
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dump_start = dump_start_time;
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dump_start = dump_start_time;
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dump_start_delay = 1;
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dump_start_delay_set = true;
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dumping_now = 0;
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dumping_now = false;
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}
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}
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else if ( (strcmp(argv[i], "-t")==0) ||
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else if ( (strcmp(argv[i], "-t")==0) ||
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(strcmp(argv[i], "--vcdstop")==0) )
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(strcmp(argv[i], "--vcdstop")==0) )
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{
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{
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time_val = atoi(argv[i+1]);
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VCD_enabled = true;
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time_val = strtod(argv[i+1],NULL);
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sc_time dump_stop_time(time_val,TIMESCALE_UNIT);
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sc_time dump_stop_time(time_val,TIMESCALE_UNIT);
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dump_stop = dump_stop_time;
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dump_stop = dump_stop_time;
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dump_stop_set = 1;
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dump_stop_set = true;
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}
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else if ( (strcmp(argv[i], "-r")==0) ||
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(strcmp(argv[i], "--rsp")==0) )
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{
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rsp_server_enabled = true;
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if (i+1 < argc) if(argv[i+1][0] != '-')
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{
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rsp_server_port = atoi(argv[i+1]);
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i++;
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}
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}
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/* Depth setting of VCD doesn't appear to work,
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}
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I think it's set during verilator script
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/*
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compile time */
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Depth setting of VCD doesn't appear to work, I think it's only
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configurable during at compile time .
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*/
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/* else if ( (strcmp(argv[i], "-p")==0) ||
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/* else if ( (strcmp(argv[i], "-p")==0) ||
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(strcmp(argv[i], "--vcddepth")==0) )
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(strcmp(argv[i], "--vcddepth")==0) )
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{
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{
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dump_depth = atoi(argv[i+1]);
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dump_depth = atoi(argv[i+1]);
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}*/
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}*/
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else if ( (strcmp(argv[i], "-h")==0) ||
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else if ( (strcmp(argv[i], "-h")==0) ||
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(strcmp(argv[i], "--help")==0) )
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(strcmp(argv[i], "--help")==0) )
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{
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{
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printf("\n ORPSoC Cycle Accurate model usage:\n");
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printf("Usage: %s [options]\n",argv[0]);
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printf(" %s [-vh] [-f <file] [-d <file>] [-e <time>] [-s <time>] [-t <time>]",argv[0]);
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printf("\n ORPSoCv2 cycle accurate model\n");
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monitor->printSwitches();
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printf(" For details visit http://opencores.org/openrisc,orpsocv2\n");
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printf("\n\n");
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printf("\n");
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printf("Options:\n");
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printf(" -h, --help\t\tPrint this help message\n");
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printf(" -h, --help\t\tPrint this help message\n");
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printf(" -e, --endtime\t\tStop the sim at this time (ns)\n");
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printf("\nSimulation control:\n");
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printf(" -f, --program\t\tLoad program from an OR32 ELF\n");
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printf(" -f, --program <file> \tLoad program from OR32 ELF <file>\n");
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printf(" -e, --endtime <val> \tStop the sim at <val> ns\n");
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printf("\nVCD generation:\n");
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printf(" -v, --vcdon\t\tEnable VCD generation\n");
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printf(" -v, --vcdon\t\tEnable VCD generation\n");
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printf(" -d, --vcdfile\t\tEnable and specify target VCD file name\n");
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printf(" -d, --vcdfile <file>\tEnable and save VCD to <file>\n");
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|
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printf(" -s, --vcdstart\tEnable and delay VCD generation until this time (ns)\n");
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printf(" -s, --vcdstart <val>\tEnable and delay VCD generation until <val> ns\n");
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printf(" -t, --vcdstop\t\tEnable and terminate VCD generation at this time (ns)\n");
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printf(" -t, --vcdstop <val> \tEnable and terminate VCD generation at <val> ns\n");
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printf("\nRemote debugging:\n");
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printf(" -r, --rsp [<port>]\tEnable RSP debugging server, opt. specify <port>\n");
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monitor->printUsage();
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monitor->printUsage();
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printf("\n");
|
printf("\n");
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return 0;
|
return 0;
|
}
|
}
|
|
|
}
|
}
|
}
|
}
|
|
|
if(cmdline_name_found==0) // otherwise use our default VCD dump file name
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vcdDumpFile = dumpNameDefault;
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|
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// Determine if we're going to setup a VCD dump:
|
// Determine if we're going to setup a VCD dump:
|
// Pretty much setting any option will enable VCD dumping.
|
// Pretty much setting any related option will enable VCD dumping.
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if ((cmdline_name_found) || (dumping_now) || (dump_start_delay) || (dump_stop_set))
|
if (VCD_enabled)
|
{
|
{
|
VCD_enabled = 1;
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|
|
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cout << "* Enabling VCD trace";
|
cout << "* Enabling VCD trace";
|
|
|
if (dump_start_delay)
|
if (dump_start_delay_set)
|
cout << ", on at time " << dump_start.to_string();
|
cout << ", on at time " << dump_start.to_string();
|
if (dump_stop_set)
|
if (dump_stop_set)
|
cout << ", off at time " << dump_stop.to_string();
|
cout << ", off at time " << dump_stop.to_string();
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cout << endl;
|
cout << endl;
|
}
|
}
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|
|
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if (rsp_server_enabled)
|
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gdbServer = new GdbServerSC ("gdb-server", FLASH_START, FLASH_END,
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rsp_server_port, jtag->tapActionQueue);
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else
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gdbServer = NULL;
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// Connect up ORPSoC
|
// Connect up ORPSoC
|
orpsoc->clk_pad_i (clk);
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orpsoc->clk_pad_i (clk);
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orpsoc->rst_pad_i (rstn);
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orpsoc->rst_pad_i (rstn);
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orpsoc->rst_pad_o (rst_o);
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orpsoc->rst_pad_o (rst_o);
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|
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orpsoc->dbg_tck_pad_i (clk); // JTAG interface
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orpsoc->dbg_tck_pad_i (jtag_tck); // JTAG interface
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orpsoc->dbg_tdi_pad_i (jtag_tdi);
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orpsoc->dbg_tdi_pad_i (jtag_tdi);
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orpsoc->dbg_tms_pad_i (jtag_tms);
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orpsoc->dbg_tms_pad_i (jtag_tms);
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orpsoc->dbg_tdo_pad_o (jtag_tdo);
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orpsoc->dbg_tdo_pad_o (jtag_tdo);
|
|
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orpsoc->uart0_srx_pad_i (uart_rx); // External UART
|
orpsoc->uart0_srx_pad_i (uart_rx); // External UART
|
| Line 262... |
Line 297... |
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|
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orpsoc->gpio_a_pad_io (gpio_a); // GPIO bus - output only in
|
orpsoc->gpio_a_pad_io (gpio_a); // GPIO bus - output only in
|
// verilator sims
|
// verilator sims
|
|
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// Connect up the VCD trace handler
|
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//trace->clk (clk); // Trace
|
|
|
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// Connect up the SystemC modules
|
// Connect up the SystemC modules
|
reset->clk (clk); // Reset
|
reset->clk (clk); // Reset
|
reset->rst (rst);
|
reset->rst (rst);
|
reset->rstn (rstn);
|
reset->rstn (rstn);
|
|
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monitor->clk (clk); // Monitor
|
monitor->clk (clk); // Monitor
|
|
|
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jtag->sysReset (rst); // JTAG
|
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jtag->tck (jtag_tck);
|
|
jtag->tdi (jtag_tdi);
|
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jtag->tdo (jtag_tdo);
|
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jtag->tms (jtag_tms);
|
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jtag->trst (jtag_trst);
|
|
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uart->clk (clk); // Uart
|
uart->clk (clk); // Uart
|
uart->uartrx (uart_rx); // orpsoc's receive line
|
uart->uartrx (uart_rx); // orpsoc's receive line
|
uart->uarttx (uart_tx); // orpsoc's transmit line
|
uart->uarttx (uart_tx); // orpsoc's transmit line
|
|
|
// Tie off signals
|
// Tie off signals
|
| Line 284... |
Line 323... |
|
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spi_sd_miso = 0; // Tie off master-in/slave-out of SD SPI bus
|
spi_sd_miso = 0; // Tie off master-in/slave-out of SD SPI bus
|
|
|
spi1_miso = 0;
|
spi1_miso = 0;
|
|
|
//#if VM_TRACE
|
|
if (VCD_enabled)
|
if (VCD_enabled)
|
{
|
{
|
Verilated::traceEverOn (true);
|
Verilated::traceEverOn (true);
|
|
|
printf("* VCD dumpfile: %s\n", vcdDumpFile.c_str());
|
printf("* VCD dumpfile: %s\n", vcdDumpFile.c_str());
|
| Line 303... |
Line 342... |
|
|
if (dumping_now)
|
if (dumping_now)
|
{
|
{
|
spTraceFile->open (vcdDumpFile.c_str());
|
spTraceFile->open (vcdDumpFile.c_str());
|
}
|
}
|
//#endif
|
|
}
|
}
|
|
|
//printf("* Beginning test\n");
|
//printf("* Beginning test\n");
|
|
|
// Init the UART function
|
// Init the UART function
|
| Line 343... |
Line 381... |
// Do memdump if enabled
|
// Do memdump if enabled
|
monitor->memdump();
|
monitor->memdump();
|
}
|
}
|
else
|
else
|
{
|
{
|
if (dump_start_delay)
|
if (dump_start_delay_set)
|
{
|
{
|
// Run the sim until we want to dump
|
// Run the sim until we want to dump
|
sc_start((double)(dump_start.to_double()),TIMESCALE_UNIT);
|
sc_start((double)(dump_start.to_double()),TIMESCALE_UNIT);
|
// Open the trace file
|
// Open the trace file
|
spTraceFile->open (vcdDumpFile.c_str());
|
spTraceFile->open (vcdDumpFile.c_str());
|
| Line 422... |
Line 460... |
sc_start();
|
sc_start();
|
}
|
}
|
|
|
|
|
// Free memory
|
// Free memory
|
|
if (rsp_server_enabled)
|
|
delete gdbServer;
|
|
delete jtag;
|
delete monitor;
|
delete monitor;
|
delete reset;
|
delete reset;
|
|
|
delete accessor;
|
delete accessor;
|
|
|
