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[/] [openrisc/] [trunk/] [orpsocv2/] [boards/] [xilinx/] [ml501/] [bench/] [verilog/] [include/] [eth_stim.v] - Diff between revs 415 and 439

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Rev 415 Rev 439
Line 74... Line 74...
// Is number of ethernet packets to send if doing the eth-rx test.
// Is number of ethernet packets to send if doing the eth-rx test.
parameter eth_stim_num_rx_only_num_packets = 500; // Set to 0 for continuous RX
parameter eth_stim_num_rx_only_num_packets = 500; // Set to 0 for continuous RX
parameter eth_stim_num_rx_only_packet_size = 512;
parameter eth_stim_num_rx_only_packet_size = 512;
parameter eth_stim_num_rx_only_packet_size_change = 2'b01;  // 2'b01: Increment
parameter eth_stim_num_rx_only_packet_size_change = 2'b01;  // 2'b01: Increment
parameter eth_stim_num_rx_only_packet_size_change_amount = 1;
parameter eth_stim_num_rx_only_packet_size_change_amount = 1;
parameter eth_stim_num_rx_only_IPG = 800000; // ns
parameter eth_stim_num_rx_only_IPG = 800000000; // ns
 
 
// Do call/response test
// Do call/response test
reg eth_stim_do_rx_reponse_to_tx;
reg eth_stim_do_rx_reponse_to_tx;
 
 
 
 
Line 630... Line 630...
 
 
         for (i=0;i<tx_len_bd;i=i+1)
         for (i=0;i<tx_len_bd;i=i+1)
           begin
           begin
              //$display("Checking address in tx bd 0x%0h",txpnt_sdram);
              //$display("Checking address in tx bd 0x%0h",txpnt_sdram);
              sdram_byte = 8'hx;
              sdram_byte = 8'hx;
 
`ifdef RAM_WB
 
              sdram_byte = dut.ram_wb0.ram_wb_b3_0.get_byte(txpnt_sdram);
 
`endif
`ifdef VERSATILE_SDRAM
`ifdef VERSATILE_SDRAM
              sdram0.get_byte(txpnt_sdram,sdram_byte);
              sdram0.get_byte(txpnt_sdram,sdram_byte);
`endif
`endif
`ifdef XILINX_DDR2
`ifdef XILINX_DDR2
              get_byte_from_xilinx_ddr2(txpnt_sdram, sdram_byte);
              get_byte_from_xilinx_ddr2(txpnt_sdram, sdram_byte);
Line 1150... Line 1152...
 
 
         for (i=0;i<len;i=i+1)
         for (i=0;i<len;i=i+1)
           begin
           begin
 
 
              sdram_byte = 8'hx;
              sdram_byte = 8'hx;
 
`ifdef RAM_WB
 
              sdram_byte = dut.ram_wb0.ram_wb_b3_0.get_byte(rxpnt_sdram);
 
`endif
`ifdef VERSATILE_SDRAM
`ifdef VERSATILE_SDRAM
              sdram0.get_byte(rxpnt_sdram,sdram_byte);
              sdram0.get_byte(rxpnt_sdram,sdram_byte);
`endif
`endif
`ifdef XILINX_DDR2
`ifdef XILINX_DDR2
              get_byte_from_xilinx_ddr2(rxpnt_sdram, sdram_byte);
              get_byte_from_xilinx_ddr2(rxpnt_sdram, sdram_byte);

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