URL https://opencores.org/ocsvn/openrisc/openrisc/trunk

Subversion Repositories openrisc

[/] [openrisc/] [trunk/] [orpsocv2/] [boards/] [xilinx/] [ml501/] [rtl/] [verilog/] [include/] [orpsoc-defines.v] - Diff between revs 530 and 655

Rev 530	Rev 655
Line 49...	Line 49...
`define BOARD_CLOCK_PERIOD 5000 // 200MHz (pS accuracy for Xilinx sims.)	`define BOARD_CLOCK_PERIOD 5000 // 200MHz (pS accuracy for Xilinx sims.)

`define JTAG_DEBUG	`define JTAG_DEBUG
// `define RAM_WB	// `define RAM_WB
// `define XILINX_SSRAM	// `define XILINX_SSRAM
	`define CFI_FLASH
`define XILINX_DDR2	`define XILINX_DDR2
`define UART0	`define UART0
`define GPIO0	`define GPIO0
`define SPI0	// `define SPI0
`define I2C0	`define I2C0
`define I2C1	`define I2C1
`define ETH0	`define ETH0
`define ETH0_PHY_RST	`define ETH0_PHY_RST