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[/] [openrisc/] [trunk/] [orpsocv2/] [rtl/] [verilog/] [ethmac/] [eth_wishbone.v] - Diff between revs 439 and 485

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Rev 439 Rev 485
Line 1255... Line 1255...
   always @ (posedge WB_CLK_I or posedge Reset)
   always @ (posedge WB_CLK_I or posedge Reset)
     begin
     begin
        if(Reset)
        if(Reset)
          TxStartFrm_wb <= 1'b0;
          TxStartFrm_wb <= 1'b0;
        else
        else
          if(TxBDReady & ~StartOccured & (TxBufferFull | TxLengthEq0))
          if(TxBDReady & ~StartOccured & (TxBufferAlmostFull | TxBufferFull| TxLengthEq0))
            TxStartFrm_wb <= 1'b1;
            TxStartFrm_wb <= 1'b1;
          else
          else
            if(TxStartFrm_syncb2)
            if(TxStartFrm_syncb2)
              TxStartFrm_wb <= 1'b0;
              TxStartFrm_wb <= 1'b0;
     end
     end

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