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/*************************************************************
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* I2C functions for the Herveille i2c controller *
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* *
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* Provides functions to read from and write to the I2C bus. *
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* Master and slave mode are both supported *
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* *
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* Julius Baxter, julius@opencores.org *
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* *
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************************************************************/
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#include "board.h"
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#include "cpu-utils.h"
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#include "i2c_master_slave.h"
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inline unsigned char i2c_master_slave_read_reg(int core, unsigned char addr)
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{
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return REG8((i2c_base_adr[core] + addr));
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}
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inline void i2c_master_slave_write_reg(int core, unsigned char addr,
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unsigned char data)
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{
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REG8((i2c_base_adr[core] + addr)) = data;
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}
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int i2c_master_slave_wait_for_busy(int core)
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{
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while (1) {
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// Check for busy flag in i2c status reg
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if (!
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(i2c_master_slave_read_reg(core, I2C_MASTER_SLAVE_SR) &
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I2C_MASTER_SLAVE_SR_BUSY))
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return 0;
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}
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}
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int i2c_master_slave_wait_for_transfer(int core)
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{
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volatile unsigned char status;
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// Wait for ongoing transmission to finish
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while (1) {
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status = i2c_master_slave_read_reg(core, I2C_MASTER_SLAVE_SR);
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// If arbitration lost
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if ((status & I2C_MASTER_SLAVE_SR_ARB_LOST) ==
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I2C_MASTER_SLAVE_SR_ARB_LOST)
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return 2;
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// If TIP bit = o , stop waiting
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else if (!(status & I2C_MASTER_SLAVE_SR_TRANSFER_IN_PRG))
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return 0;
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}
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}
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/***********************************************************
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* i2c_master_slave_init_core *
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* *
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* Setup i2c core: *
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* Write prescaler register with parmeter passed, enable *
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* core in control register, optionally enable interrupts *
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************************************************************/
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int i2c_master_slave_init_core(int core, unsigned short prescaler,
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int interrupt_enable)
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{
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// Setup I2C prescaler,
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i2c_master_slave_write_reg(core, I2C_MASTER_SLAVE_PRERlo,
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prescaler & 0xff);
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i2c_master_slave_write_reg(core, I2C_MASTER_SLAVE_PRERhi,
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(prescaler >> 8) & 0xff);
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// Enable I2C controller and optionally interrupts
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if (interrupt_enable)
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i2c_master_slave_write_reg(core, I2C_MASTER_SLAVE_CTR,
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I2C_MASTER_SLAVE_CTR_CORE_ENABLE |
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I2C_MASTER_SLAVE_CTR_INTR_ENABLE);
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else
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i2c_master_slave_write_reg(core, I2C_MASTER_SLAVE_CTR,
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I2C_MASTER_SLAVE_CTR_CORE_ENABLE);
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return 0;
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}
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/***********************************************************
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* i2c_master_slave_deact_core *
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* *
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* Deactivate i2c core: *
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* Clear core enable and interrupt enable bits *
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************************************************************/
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int i2c_master_slave_deact_core(int core)
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{
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i2c_master_slave_write_reg(core, I2C_MASTER_SLAVE_CTR,
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i2c_master_slave_read_reg(core,
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I2C_MASTER_SLAVE_CTR) &
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~(I2C_MASTER_SLAVE_CTR_CORE_ENABLE |
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I2C_MASTER_SLAVE_CTR_INTR_ENABLE));
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return 0;
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}
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/***********************************************************
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* i2c_master_slave_init_as_slave *
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* *
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* Setup i2c core to service slave accesses *
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* OR in slave enable bit to control register *
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* Set slave address *
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************************************************************/
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int i2c_master_slave_init_as_slave(int core, char addr)
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{
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// Set slave enable bit
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i2c_master_slave_write_reg(core, I2C_MASTER_SLAVE_CTR,
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i2c_master_slave_read_reg(core,
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I2C_MASTER_SLAVE_CTR)
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| I2C_MASTER_SLAVE_CTR_SLAVE_ENABLE);
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// Set slave address
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i2c_master_slave_write_reg(core, I2C_MASTER_SLAVE_SLADR, addr);
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return 0;
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}
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/***********************************************************
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* i2c_master_slave_deact_as_slave *
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* *
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* Disable slave mode for this I2C core *
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* Deassert slave eanble bit in control register *
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************************************************************/
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int i2c_master_slave_deact_as_slave(int core)
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{
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// Clear slave enable bit
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i2c_master_slave_write_reg(core, I2C_MASTER_SLAVE_CTR,
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i2c_master_slave_read_reg(core,
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I2C_MASTER_SLAVE_CTR)
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& ~I2C_MASTER_SLAVE_CTR_SLAVE_ENABLE);
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return 0;
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}
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/***********************************************************
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* i2c_master_slave_master_start *
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* *
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* Get the i2c bus. *
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************************************************************/
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int i2c_master_slave_master_start(int core, unsigned char addr, int read)
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{
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i2c_master_slave_wait_for_busy(core);
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// Set address in transfer register
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i2c_master_slave_write_reg(core, I2C_MASTER_SLAVE_TXR,
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(addr << 1) | read);
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// Start and write the address
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i2c_master_slave_write_reg(core, I2C_MASTER_SLAVE_CR,
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I2C_MASTER_SLAVE_CR_START |
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I2C_MASTER_SLAVE_CR_WRITE);
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i2c_master_slave_wait_for_transfer(core);
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return 0;
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}
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/***********************************************************
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* i2c_master_slave_master_write *
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* *
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* Send 1 byte of data *
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************************************************************/
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int i2c_master_slave_master_write(int core, unsigned char data,
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int check_prev_ack, int stop)
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{
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if (i2c_master_slave_wait_for_transfer(core))
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return 1;
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// present data
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i2c_master_slave_write_reg(core, I2C_MASTER_SLAVE_TXR, data);
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if (!stop)
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// set command (write)
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i2c_master_slave_write_reg(core, I2C_MASTER_SLAVE_CR,
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I2C_MASTER_SLAVE_CR_WRITE);
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else
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// set command (write) and stop
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i2c_master_slave_write_reg(core, I2C_MASTER_SLAVE_CR,
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I2C_MASTER_SLAVE_CR_WRITE |
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I2C_MASTER_SLAVE_CR_STOP);
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return 0;
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}
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/***********************************************************
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* i2c_master_slave_master_stop *
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* *
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* Send stop condition *
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************************************************************/
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int i2c_master_slave_master_stop(int core)
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{
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unsigned char status;
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unsigned char ready = 0;
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// Make I2C controller wait at end of finished byte
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if (i2c_master_slave_wait_for_transfer(core))
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return 1;
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// Send stop condition
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i2c_master_slave_write_reg(core, I2C_MASTER_SLAVE_CR,
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I2C_MASTER_SLAVE_CR_STOP);
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return 0;
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}
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/***********************************************************
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* i2c_master_slave_master_read *
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* *
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* Read 1 byte of data *
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************************************************************/
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int i2c_master_slave_master_read(int core, int check_prev_ack,
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int stop, char *data)
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{
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// Make I2C controller wait at end of finished byte
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if (i2c_master_slave_wait_for_transfer(core))
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return 1;
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if (stop)
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i2c_master_slave_write_reg(core, I2C_MASTER_SLAVE_CR,
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I2C_MASTER_SLAVE_CR_READ |
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I2C_MASTER_SLAVE_CR_STOP);
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else
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i2c_master_slave_write_reg(core, I2C_MASTER_SLAVE_CR,
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I2C_MASTER_SLAVE_CR_READ);
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if (i2c_master_slave_wait_for_transfer(core))
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return 1;
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*data = i2c_master_slave_read_reg(core, I2C_MASTER_SLAVE_RXR);
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return 0;
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}
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/***********************************************************
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* i2c_master_slave_ack_interrupt *
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* *
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* Acknowledge interrupt has been serviced *
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************************************************************/
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int i2c_master_slave_ack_interrupt(int core)
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{
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i2c_master_slave_write_reg(core, I2C_MASTER_SLAVE_CR,
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I2C_MASTER_SLAVE_CR_IACK);
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return 0;
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}
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