| Line 59... |
Line 59... |
for this processor architecture. It is also necessary to
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for this processor architecture. It is also necessary to
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select a specific target platform HAL package."
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select a specific target platform HAL package."
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|
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compile context.S vectors.S hal_misc.c openrisc_stub.c
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compile context.S vectors.S hal_misc.c openrisc_stub.c
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|
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implements CYGINT_HAL_DEBUG_GDB_STUBS
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implements CYGINT_HAL_DEBUG_GDB_STUBS_BREAK
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make {
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make {
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/lib/vectors.o : /src/vectors.S
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/lib/vectors.o : /src/vectors.S
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$(CC) -Wp,-MD,vectors.tmp $(INCLUDE_PATH) $(CFLAGS) -c -o $@ $<
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$(CC) -Wp,-MD,vectors.tmp $(INCLUDE_PATH) $(CFLAGS) -c -o $@ $<
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@echo $@ ": \\" > $(notdir $@).deps
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@echo $@ ": \\" > $(notdir $@).deps
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@tail -n +2 vectors.tmp >> $(notdir $@).deps
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@tail -n +2 vectors.tmp >> $(notdir $@).deps
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| Line 91... |
Line 88... |
@tail -n +2 target.tmp >> $(notdir $@).deps
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@tail -n +2 target.tmp >> $(notdir $@).deps
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@echo >> $(notdir $@).deps
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@echo >> $(notdir $@).deps
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@rm target.tmp
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@rm target.tmp
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}
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}
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cdl_component CYG_HAL_STARTUP {
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display "Startup type"
|
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flavor data
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legal_values {"RAM" "ROM" "JTAG"}
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default_value {"JTAG"}
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no_define
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define -file system.h CYG_HAL_STARTUP
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description "
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Selects whether code initially runs from ROM or RAM. In the case of ROM startup,
|
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it's possible for the code to be copied into RAM and executed there."
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}
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cdl_component CYGHWR_MEMORY_LAYOUT {
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display "Memory layout"
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flavor data
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no_define
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calculated { CYG_HAL_STARTUP == "ROM" ? "openrisc_orpsoc_rom" : \
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"openrisc_orpsoc_ram" }
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cdl_option CYGHWR_MEMORY_LAYOUT_LDI {
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display "Memory layout linker script fragment"
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flavor data
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no_define
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define -file system.h CYGHWR_MEMORY_LAYOUT_LDI
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calculated { CYG_HAL_STARTUP == "ROM" ? "" : \
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"" }
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}
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|
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cdl_option CYGHWR_MEMORY_LAYOUT_H {
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display "Memory layout header file"
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flavor data
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no_define
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define -file system.h CYGHWR_MEMORY_LAYOUT_H
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calculated { CYG_HAL_STARTUP == "ROM" ? "" : \
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"" }
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}
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}
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# Real-time clock/counter specifics
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cdl_component CYGNUM_HAL_RTC_CONSTANTS {
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display "Real-time clock constants."
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flavor none
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cdl_option CYGNUM_HAL_RTC_NUMERATOR {
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display "Real-time clock numerator"
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flavor data
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default_value 1000000000
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}
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cdl_option CYGNUM_HAL_RTC_DENOMINATOR {
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display "Real-time clock denominator"
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flavor data
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default_value 100
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}
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cdl_option CYGNUM_HAL_RTC_PERIOD {
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display "Real-time clock period"
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flavor data
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default_value {CYGHWR_HAL_OPENRISC_CPU_FREQ * 1000000 / CYGNUM_HAL_RTC_DENOMINATOR}
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description "
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The tick timer facility is used
|
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to drive the eCos kernel RTC. The count register
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increments at the CPU clock speed. By default, 100 Hz"
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}
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}
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cdl_component CYGBLD_GLOBAL_OPTIONS {
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display "Global build options"
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flavor none
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description "
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Global build options including control over
|
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compiler flags, linker flags and choice of toolchain."
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parent CYGPKG_NONE
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cdl_option CYGBLD_GLOBAL_COMMAND_PREFIX {
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display "Global command prefix"
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flavor data
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no_define
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default_value { "or32-elf" }
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description "
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This option specifies the command prefix used when
|
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invoking the build tools."
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}
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cdl_option CYGBLD_GLOBAL_CFLAGS {
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display "Global compiler flags"
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flavor data
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no_define
|
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default_value { CYGBLD_GLOBAL_WARNFLAGS .
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"-g -O2 -fno-omit-frame-pointer -fno-rtti -fno-exceptions " .
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(CYGHWR_MUL_IMPLEMENTED ? "-mhard-mul " : "-msoft-mul ") .
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(CYGHWR_DIV_IMPLEMENTED ? "-mhard-div " : "-msoft-div ") .
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(CYGHWR_FPU_IMPLEMENTED ? "-mhard-float " : "-msoft-float ") }
|
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description "
|
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This option controls the global compiler flags which
|
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are used to compile all packages by
|
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default. Individual packages may define
|
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options which override these global flags."
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}
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|
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cdl_option CYGBLD_GLOBAL_LDFLAGS {
|
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display "Global linker flags"
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flavor data
|
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no_define
|
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default_value { "-g -O2 -nostdlib -Wl,--gc-sections -Wl,-static " .
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(CYGHWR_MUL_IMPLEMENTED ? "-mhard-mul " : "-msoft-mul ") .
|
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(CYGHWR_DIV_IMPLEMENTED ? "-mhard-div " : "-msoft-div ") .
|
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(CYGHWR_FPU_IMPLEMENTED ? "-mhard-float " : "-msoft-float ") }
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description "
|
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This option controls the global linker flags. Individual
|
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packages may define options which override these global flags."
|
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}
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}
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|
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cdl_option CYGBLD_BUILD_GDB_STUBS {
|
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display "Build GDB stub ROM image"
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default_value 0
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parent CYGBLD_GLOBAL_OPTIONS
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requires { CYG_HAL_STARTUP == "ROM" }
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requires CYGSEM_HAL_ROM_MONITOR
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requires CYGBLD_BUILD_COMMON_GDB_STUBS
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requires CYGDBG_HAL_DEBUG_GDB_INCLUDE_STUBS
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requires ! CYGDBG_HAL_DEBUG_GDB_BREAK_SUPPORT
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requires ! CYGDBG_HAL_DEBUG_GDB_THREAD_SUPPORT
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requires ! CYGDBG_HAL_COMMON_INTERRUPTS_SAVE_MINIMUM_CONTEXT
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requires ! CYGDBG_HAL_COMMON_CONTEXT_SAVE_MINIMUM
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no_define
|
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description "
|
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This option enables the building of the GDB stubs for the
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board. The common HAL controls takes care of most of the
|
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build process, but the final conversion from ELF image to
|
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binary data is handled by the platform CDL, allowing
|
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relocation of the data if necessary."
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make -priority 320 {
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/bin/gdb_module.bin : /bin/gdb_module.img
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$(OBJCOPY) -O binary $< $@
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}
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}
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cdl_option CYGNUM_HAL_BREAKPOINT_LIST_SIZE {
|
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display "Number of breakpoints supported by the HAL."
|
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flavor data
|
|
default_value 25
|
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description "
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This option determines the number of breakpoints supported by the HAL."
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}
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cdl_option CYGSEM_HAL_USE_ROM_MONITOR {
|
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display "Work with a ROM monitor"
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flavor bool
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default_value { CYG_HAL_STARTUP == "RAM" ? 1 : 0 }
|
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parent CYGPKG_HAL_ROM_MONITOR
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requires { CYG_HAL_STARTUP == "RAM" }
|
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description "
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Allow coexistence with ROM monitor (CygMon or GDB stubs) by
|
|
only initializing interrupt vectors on startup, thus leaving
|
|
exception handling to the ROM monitor."
|
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}
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|
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cdl_option CYGSEM_HAL_ROM_MONITOR {
|
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display "Behave as a ROM monitor"
|
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flavor bool
|
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default_value 0
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parent CYGPKG_HAL_ROM_MONITOR
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requires { CYG_HAL_STARTUP == "ROM" }
|
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description "
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Enable this option if this program is to be used as a ROM monitor,
|
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i.e. applications will be loaded into RAM on the board, and this
|
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ROM monitor may process exceptions or interrupts generated from the
|
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application. This enables features such as utilizing a separate
|
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interrupt stack when exceptions are generated."
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}
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cdl_component CYGPKG_REDBOOT_HAL_OPTIONS {
|
|
display "Redboot HAL options"
|
|
flavor none
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no_define
|
|
parent CYGPKG_REDBOOT
|
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active_if CYGPKG_REDBOOT
|
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description "
|
|
This option lists the target's requirements for a valid Redboot
|
|
configuration."
|
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|
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cdl_option CYGBLD_BUILD_REDBOOT_BIN {
|
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display "Build Redboot ROM binary image"
|
|
active_if CYGBLD_BUILD_REDBOOT
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default_value 1
|
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no_define
|
|
description "This option enables the conversion of the Redboot ELF
|
|
image to a binary image suitable for ROM programming."
|
|
|
|
compile -library=libextras.a
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|
|
|
make -priority 325 {
|
|
/bin/redboot.srec : /bin/redboot.elf
|
|
$(OBJCOPY) --strip-all $< $(@:.srec=.img)
|
|
$(OBJCOPY) -O srec $< $@
|
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}
|
|
}
|
|
}
|
|
|
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cdl_option CYGHWR_HAL_OPENRISC_CPU_FREQ {
|
|
display "CPU frequency"
|
|
flavor data
|
|
legal_values 0 to 1000000
|
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default_value 50
|
|
description "
|
|
This option contains the frequency of the CPU in MegaHertz.
|
|
Choose the frequency to match the processor you have. This
|
|
may affect thing like serial device, interval clock and
|
|
memory access speed settings."
|
|
}
|
|
|
|
cdl_option CYGHWR_MUL_IMPLEMENTED {
|
|
display "Hardware multiplier implemented"
|
|
flavor bool
|
|
default_value 1
|
|
description "
|
|
Select this option only if hardware multiplier is
|
|
implemented."
|
|
}
|
|
|
|
cdl_option CYGHWR_DIV_IMPLEMENTED {
|
|
display "Hardware divisor implemented"
|
|
flavor bool
|
|
default_value 1
|
|
description "
|
|
Select this option only if hardware division is
|
|
implemented."
|
|
}
|
|
|
|
cdl_option CYGHWR_FPU_IMPLEMENTED {
|
|
display "Hardware FPU implemented"
|
|
flavor bool
|
|
default_value 0
|
|
description "
|
|
Select this option only if FPU is implemented."
|
|
}
|
|
|
|
cdl_component CYGHWR_CACHE {
|
|
|
|
display "Cache"
|
|
flavor none
|
|
description "
|
|
Cache is optional in the OpenRISC architecture. Removing
|
|
cache is a common way to save hardware space."
|
|
|
|
cdl_option CYGHWR_ICACHE_IMPLEMENTED {
|
|
display "Instruction cache implemented"
|
|
flavor bool
|
|
default_value 1
|
|
description "
|
|
Select this option only if instruction cache is
|
|
implemented."
|
|
}
|
|
|
|
cdl_option CYGHWR_ICACHE_SIZE {
|
|
display "Instruction cache size"
|
|
active_if CYGHWR_ICACHE_IMPLEMENTED
|
|
flavor data
|
|
legal_values 4096 8192
|
|
default_value 8192
|
|
description "
|
|
Size of the instruction cache."
|
|
}
|
|
|
|
cdl_option CYGHWR_DCACHE_IMPLEMENTED {
|
|
display "Data cache implemented"
|
|
flavor bool
|
|
default_value 1
|
|
description "
|
|
Select this option only if data cache is
|
|
implemented."
|
|
}
|
|
|
|
cdl_option CYGHWR_DCACHE_SIZE {
|
|
display "Data cache size"
|
|
active_if CYGHWR_DCACHE_IMPLEMENTED
|
|
flavor data
|
|
legal_values 4096 8192
|
|
default_value 4096
|
|
description "
|
|
Size of the data cache."
|
|
}
|
|
|
|
}
|
|
|
|
}
|
}
|
|
|
# EOF hal_openrisc.cdl
|
# EOF hal_openrisc.cdl
|
