| Line 33... |
Line 33... |
output is_receiving, // Low when receive line is idle.
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output is_receiving, // Low when receive line is idle.
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output is_transmitting, // Low when transmit line is idle.
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output is_transmitting, // Low when transmit line is idle.
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output recv_error // Indicates error in receiving packet.
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output recv_error // Indicates error in receiving packet.
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);
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);
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parameter CLOCK_DIVIDE = 325; // clock rate (50Mhz) / baud rate (9600) / 16
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parameter CLOCK_DIVIDE = 1302; // clock rate (50Mhz) / (baud rate (9600) * 4)
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// States for the receiving state machine.
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// States for the receiving state machine.
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// These are just constants, not parameters to override.
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// These are just constants, not parameters to override.
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parameter RX_IDLE = 0;
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parameter RX_IDLE = 0;
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parameter RX_CHECK_START = 1;
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parameter RX_CHECK_START = 1;
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| Line 104... |
Line 104... |
// start of data.
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// start of data.
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if (!rx) begin
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if (!rx) begin
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// Wait half the period - should resume in the
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// Wait half the period - should resume in the
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// middle of this first pulse.
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// middle of this first pulse.
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rx_clk_divider = CLOCK_DIVIDE;
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rx_clk_divider = CLOCK_DIVIDE;
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rx_countdown = 8;
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rx_countdown = 2;
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recv_state = RX_CHECK_START;
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recv_state = RX_CHECK_START;
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end
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end
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end
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end
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RX_CHECK_START: begin
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RX_CHECK_START: begin
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if (!rx_countdown) begin
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if (!rx_countdown) begin
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// Check the pulse is still there
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// Check the pulse is still there
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if (!rx) begin
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if (!rx) begin
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// Pulse still there - good
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// Pulse still there - good
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// Wait the bit period to resume half-way
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// Wait the bit period to resume half-way
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// through the first bit.
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// through the first bit.
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rx_countdown = 16;
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rx_countdown = 4;
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rx_bits_remaining = 8;
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rx_bits_remaining = 8;
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recv_state = RX_READ_BITS;
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recv_state = RX_READ_BITS;
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end else begin
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end else begin
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// Pulse lasted less than half the period -
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// Pulse lasted less than half the period -
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// not a valid transmission.
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// not a valid transmission.
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| Line 131... |
Line 131... |
if (!rx_countdown) begin
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if (!rx_countdown) begin
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// Should be half-way through a bit pulse here.
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// Should be half-way through a bit pulse here.
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// Read this bit in, wait for the next if we
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// Read this bit in, wait for the next if we
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// have more to get.
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// have more to get.
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rx_data = {rx, rx_data[7:1]};
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rx_data = {rx, rx_data[7:1]};
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rx_countdown = 16;
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rx_countdown = 4;
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rx_bits_remaining = rx_bits_remaining - 1;
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rx_bits_remaining = rx_bits_remaining - 1;
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recv_state = rx_bits_remaining ? RX_READ_BITS : RX_CHECK_STOP;
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recv_state = rx_bits_remaining ? RX_READ_BITS : RX_CHECK_STOP;
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end
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end
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end
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end
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RX_CHECK_STOP: begin
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RX_CHECK_STOP: begin
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| Line 155... |
Line 155... |
// There was an error receiving.
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// There was an error receiving.
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// Raises the recv_error flag for one clock
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// Raises the recv_error flag for one clock
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// cycle while in this state and then waits
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// cycle while in this state and then waits
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// 2 bit periods before accepting another
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// 2 bit periods before accepting another
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// transmission.
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// transmission.
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rx_countdown = 32;
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rx_countdown = 8;
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recv_state = RX_DELAY_RESTART;
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recv_state = RX_DELAY_RESTART;
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end
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end
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RX_RECEIVED: begin
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RX_RECEIVED: begin
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// Successfully received a byte.
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// Successfully received a byte.
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// Raises the received flag for one clock
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// Raises the received flag for one clock
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// cycle while in this state and then waits
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// cycle while in this state.
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// 1/4 bit period before starting back in the
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recv_state = RX_IDLE;
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// idle state. This only actually waits for
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// 3/4 of the stop bit before resuming, but
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// this should not do any harm as the stop bit
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// is received the same as the line idle state.
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rx_countdown = 4;
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recv_state = RX_DELAY_RESTART;
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end
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end
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endcase
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endcase
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// Transmit state machine
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// Transmit state machine
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case (tx_state)
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case (tx_state)
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| Line 183... |
Line 177... |
// of the tx_byte input.
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// of the tx_byte input.
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tx_data = tx_byte;
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tx_data = tx_byte;
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// Send the initial, low pulse of 1 bit period
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// Send the initial, low pulse of 1 bit period
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// to signal the start, followed by the data
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// to signal the start, followed by the data
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tx_clk_divider = CLOCK_DIVIDE;
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tx_clk_divider = CLOCK_DIVIDE;
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tx_countdown = 16;
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tx_countdown = 4;
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tx_out = 0;
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tx_out = 0;
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tx_bits_remaining = 8;
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tx_bits_remaining = 8;
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tx_state = TX_SENDING;
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tx_state = TX_SENDING;
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end
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end
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end
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end
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| Line 195... |
Line 189... |
if (!tx_countdown) begin
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if (!tx_countdown) begin
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if (tx_bits_remaining) begin
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if (tx_bits_remaining) begin
|
tx_bits_remaining = tx_bits_remaining - 1;
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tx_bits_remaining = tx_bits_remaining - 1;
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tx_out = tx_data[0];
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tx_out = tx_data[0];
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tx_data = {1'b0, tx_data[7:1]};
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tx_data = {1'b0, tx_data[7:1]};
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tx_countdown = 16;
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tx_countdown = 4;
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tx_state = TX_SENDING;
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tx_state = TX_SENDING;
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end else begin
|
end else begin
|
// Set delay to send out 2 stop bits.
|
// Set delay to send out 2 stop bits.
|
tx_out = 1;
|
tx_out = 1;
|
tx_countdown = 32;
|
tx_countdown = 8;
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tx_state = TX_DELAY_RESTART;
|
tx_state = TX_DELAY_RESTART;
|
end
|
end
|
end
|
end
|
end
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end
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TX_DELAY_RESTART: begin
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TX_DELAY_RESTART: begin
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