URL https://opencores.org/ocsvn/pairing/pairing/trunk

Subversion Repositories pairing

[/] [pairing/] [trunk/] [rtl/] [tate_pairing.v] - Diff between revs 24 and 27

Rev 24	Rev 27
Line 37...	Line 37...
`reg f3m_reset, delay1, delay2;`	`reg f3m_reset, delay1, delay2;`
wire [`W6:0] g,v7,v8;	wire [`W6:0] g,v7,v8;
wire [`WIDTH:0] mu /* my name is "mew" */,nmu,ny,	wire [`WIDTH:0] mu /* my name is "mew" */,nmu,ny,
`x,v2,v3,v4,v5,v6;`	`x,v2,v3,v4,v5,v6;`
`wire [1:0] v9;`	`wire [1:0] v9;`
`wire f36m_reset, dummy, f3m_done, f36m_done, finish;`	`wire f36m_reset, dummy, f3m_done, f36m_done, finish, change;`

assign g = {`ZERO,`TWO,`ZERO,nmu,v6,v5};	assign g = {`ZERO,`TWO,`ZERO,nmu,v6,v5};
`assign finish = i[0];`	`assign finish = i[0];`

`f3m_cubic`	`f3m_cubic`
Line 112...	Line 112...
input [`WIDTH:0] x1, y1, x2, y2;	input [`WIDTH:0] x1, y1, x2, y2;
`output reg done;`	`output reg done;`
output reg [`W6:0] out;	output reg [`W6:0] out;

`reg delay1, rst1;`	`reg delay1, rst1;`
`wire done1, rst2;`	`wire done1, rst2, done2;`
wire [`W6:0] out1, out2;	wire [`W6:0] out1, out2;
`reg [2:0] K;`	`reg [2:0] K;`

`duursma_lee_algo`	`duursma_lee_algo`
`ins1 (clk, rst1, x1, y1, x2, y2, done1, out1);`	`ins1 (clk, rst1, x1, y1, x2, y2, done1, out1);`