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// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
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// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
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// SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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// SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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////////////////////////////////////////////////////////////////////////////////
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////////////////////////////////////////////////////////////////////////////////
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// 45678901234567890123456789012345678901234567890123456789012345678901234567890
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// 45678901234567890123456789012345678901234567890123456789012345678901234567890
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module pit_regs #(parameter ARST_LVL = 1'b0, // asynchronous reset level
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module pit_regs #(parameter COUNT_SIZE = 16,
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parameter COUNT_SIZE = 16,
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parameter NO_PRESCALE = 1'b0,
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parameter NO_PRESCALE = 1'b0,
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parameter DWIDTH = 16)
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parameter DWIDTH = 16)
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(
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(
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output logic [COUNT_SIZE-1:0] mod_value, // Main Counter Modulo Value
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output logic [COUNT_SIZE-1:0] mod_value, // Main Counter Modulo Value
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output [ 3:0] pit_pre_scl, // PIT Prescaler Value
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output [ 3:0] pit_pre_scl, // PIT Prescaler Value
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cnt_sync_o <= 1'b0;
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cnt_sync_o <= 1'b0;
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mod_value <= 0;
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mod_value <= 0;
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end
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end
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else
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else
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case (write_regs) // synopsys parallel_case
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case (write_regs) // synopsys parallel_case
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4'b0011 :
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4'b0011 : // 16-bit write
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begin
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begin
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pit_slave <= write_data[15];
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pit_slave <= write_data[15];
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pit_pre <= write_data[11:8];
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pit_pre <= write_data[11:8];
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pit_flg_clr <= write_data[2];
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pit_flg_clr <= write_data[2];
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pit_ien <= write_data[1];
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pit_ien <= write_data[1];
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cnt_sync_o <= write_data[0];
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cnt_sync_o <= write_data[0];
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end
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end
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4'b0001 :
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4'b0001 : // 8-bit low byte write
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begin
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begin
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pit_flg_clr <= write_data[2];
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pit_flg_clr <= write_data[2];
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pit_ien <= write_data[1];
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pit_ien <= write_data[1];
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cnt_sync_o <= write_data[0];
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cnt_sync_o <= write_data[0];
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end
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end
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4'b0010 :
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4'b0010 : // 8-bit high byte write
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begin
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begin
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pit_slave <= write_data[7];
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pit_slave <= write_data[7];
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pit_pre <= write_data[3:0];
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pit_pre <= write_data[3:0];
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end
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end
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4'b1100 : mod_value <= write_data;
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4'b1100 : mod_value <= write_data;
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