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--! @brief Simple UART module.
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--! @brief Simple UART module.
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--! The following registers are defined:
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--! The following registers are defined:
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--! 0 - Transmit data register (write-only)
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--! 0 - Transmit data register (write-only)
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--! 1 - Receive data register (read-only)
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--! 1 - Receive data register (read-only)
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--! 2 - Status register; (read-only)
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--! 2 - Status register; (read-only)
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--! - Bit 0: data in receive buffer
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--! - Bit 0: no data in receive buffer
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--! - Bit 1: no data in transmit buffer
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--! - Bit 1: no data in transmit buffer
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--! - Bit 2: receive buffer full
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--! - Bit 2: receive buffer full
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--! - Bit 3: transmit buffer full
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--! - Bit 3: transmit buffer full
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--! 3 - Control register, currently unused.
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--! 3 - Control register, currently unused.
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entity pp_soc_uart is
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entity pp_soc_uart is
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Line 295... |
else -- Read from register
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else -- Read from register
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if wb_adr_in = b"01" then
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if wb_adr_in = b"01" then
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recv_buffer_pop <= '1';
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recv_buffer_pop <= '1';
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wb_state <= READ_ACK;
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wb_state <= READ_ACK;
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elsif wb_adr_in = b"10" then
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elsif wb_adr_in = b"10" then
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wb_dat_out <= x"0" & send_buffer_full & recv_buffer_full & send_buffer_empty & not recv_buffer_empty;
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wb_dat_out <= x"0" & send_buffer_full & recv_buffer_full & send_buffer_empty & recv_buffer_empty;
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wb_ack <= '1';
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wb_ack <= '1';
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wb_state <= READ_ACK;
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wb_state <= READ_ACK;
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else
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else
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wb_dat_out <= (others => '0');
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wb_dat_out <= (others => '0');
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wb_ack <= '1';
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wb_ack <= '1';
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