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[/] [qaz_libs/] [trunk/] [PCIe/] [sim/] [tests/] [tb_riffa_register_file/] [tb_riffa_register_file.sv] - Diff between revs 32 and 34

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Rev 32 Rev 34
Line 51... Line 51...
 
 
 
 
  // --------------------------------------------------------------------
  // --------------------------------------------------------------------
  //
  //
  riffa_chnl_if #(.N(N)) chnl_in(.*);
  riffa_chnl_if #(.N(N)) chnl_in(.*);
  riffa_register_if #(.N(N), .MW(MW)) r_if(.*);
  riffa_register_if #(.N(N), .B(B)) r_if(.*); // dword sized (32 bit) registers
 
 
 
 
  // --------------------------------------------------------------------
  // --------------------------------------------------------------------
  //
  //
  riffa_register_file #(.A(A), .N(N), .MW(MW))
  riffa_register_file #(.N(N), .B(B))
    dut(.*);
    dut(.*);
 
 
 
 
  // --------------------------------------------------------------------
  // --------------------------------------------------------------------
  // sim models
  // sim models
Line 68... Line 68...
  // \|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/
  // \|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/-\|/
  //  '   '   '   '   '   '   '   '   '   '   '   '   '   '   '   '   '
  //  '   '   '   '   '   '   '   '   '   '   '   '   '   '   '   '   '
 
 
  // --------------------------------------------------------------------
  // --------------------------------------------------------------------
  //
  //
  for(genvar j = 0; j < MI; j++)
  for(genvar j = 0; j < r_if.RC; j++)
    assign r_if.register_in[j] = r_if.register_out[j];
    assign r_if.register_in[j] = r_if.register_out[j];
 
 
 
 
  // --------------------------------------------------------------------
  // --------------------------------------------------------------------
  //
  //

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