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[/] [qaz_libs/] [trunk/] [PCIe/] [src/] [RIFFA/] [riffa_axis_test_pattern.sv] - Diff between revs 37 and 39

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Rev 37 Rev 39
Line 32... Line 32...
    N, // RIFFA data bus width in bytes
    N, // RIFFA data bus width in bytes
    W = 4, // word width in bytes
    W = 4, // word width in bytes
    WPB = N / W // number of words per beat
    WPB = N / W // number of words per beat
  )
  )
  (
  (
    riffa_chnl_if chnl_in,
    riffa_chnl_if chnl_bus,
    input [31:0] tx_len,
    input [31:0] tx_len,
    input clk,
    input clk,
    input reset
    input reset
  );
  );
 
 
Line 75... Line 75...
    riffa_chn_tx_i(.*);
    riffa_chn_tx_i(.*);
 
 
 
 
  // --------------------------------------------------------------------
  // --------------------------------------------------------------------
  //
  //
  assign axis_out.tready = chnl_in.tx_data_ren & acked;
  assign axis_out.tready = chnl_bus.tx_data_ren & acked;
 
 
 
 
  // --------------------------------------------------------------------
  // --------------------------------------------------------------------
  //
  //
  assign chnl_in.rx_clk = clk;
  assign chnl_bus.rx_clk = clk;
  assign chnl_in.tx_clk = clk;
  assign chnl_bus.tx_clk = clk;
  assign chnl_in.rx_reset = reset;
  assign chnl_bus.rx_reset = reset;
  assign chnl_in.tx_reset = reset;
  assign chnl_bus.tx_reset = reset;
  assign chnl_in.tx_last = tx_last;
  assign chnl_bus.tx_last = tx_last;
  assign chnl_in.tx_len = tx_len;
  assign chnl_bus.tx_len = tx_len;
  assign chnl_in.tx_off = tx_off;
  assign chnl_bus.tx_off = tx_off;
  assign chnl_in.tx_data_valid = axis_out.tvalid & acked;
  assign chnl_bus.tx_data_valid = axis_out.tvalid & acked;
  assign chnl_in.tx_data = axis_out.tdata;
  assign chnl_bus.tx_data = axis_out.tdata;
 
 
// --------------------------------------------------------------------
// --------------------------------------------------------------------
//
//
endmodule
endmodule
 
 

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