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[/] [qaz_libs/] [trunk/] [axi4_lib/] [sim/] [src/] [BP065-BU-01000-r0p1-00rel0/] [axi4_checker.sv] - Diff between revs 29 and 31

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Rev 29 Rev 31
Line 36... Line 36...
    MAXRBURSTS    = 16,
    MAXRBURSTS    = 16,
    MAXWBURSTS    = 16,
    MAXWBURSTS    = 16,
    MAXWAITS      = 16,
    MAXWAITS      = 16,
    RecommendOn   = 1'b1,
    RecommendOn   = 1'b1,
    RecMaxWaitOn  = 1'b1,
    RecMaxWaitOn  = 1'b1,
    EXMON_WIDTH   = 4,
    EXMON_WIDTH   = 4
    PROTOCOL      = 2'b00
 
  )
  )
  (
  (
    axi4_if axi4_in
    axi4_if axi4_in
  );
  );
 
 
Line 163... Line 162...
      .RecommendOn(RecommendOn), //   = 1'b1;
      .RecommendOn(RecommendOn), //   = 1'b1;
      // enable/disable reporting of just AXI4_REC*_MAX_WAIT rules
      // enable/disable reporting of just AXI4_REC*_MAX_WAIT rules
      .RecMaxWaitOn(RecMaxWaitOn), //  = 1'b1;
      .RecMaxWaitOn(RecMaxWaitOn), //  = 1'b1;
 
 
      // Set the protocol - used to disable some AXI4 checks for ACE
      // Set the protocol - used to disable some AXI4 checks for ACE
      //PROTOCOL define the protocol
      // .PROTOCOL(PROTOCOL), // = `AXI4PC_AMBA_AXI4;
      // `define AXI4PC_AMBA_AXI4         2'b00
 
      // `define AXI4PC_AMBA_ACE          2'b01
 
      // `define AXI4PC_AMBA_ACE_LITE     2'b10
 
      .PROTOCOL(PROTOCOL), // = `AXI4PC_AMBA_AXI4;
 
 
 
      // Set ADDR_WIDTH to the address-bus width required
      // Set ADDR_WIDTH to the address-bus width required
      .ADDR_WIDTH(A), // = 32;        // address bus width, default = 32-bit
      .ADDR_WIDTH(A), // = 32;        // address bus width, default = 32-bit
 
 
      // Set EXMON_WIDTH to the exclusive access monitor width required
      // Set EXMON_WIDTH to the exclusive access monitor width required

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