| Line 108... |
Line 108... |
m_last_sck = 1;
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m_last_sck = 1;
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m_write_count = 0;
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m_write_count = 0;
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m_ireg = m_oreg = 0;
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m_ireg = m_oreg = 0;
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m_sreg = 0x01c;
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m_sreg = 0x01c;
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m_creg = 0x001; // Initial creg on delivery
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m_creg = 0x001; // Initial creg on delivery
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m_config = 0x7; // Volatile configuration register
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m_vconfig = 0x7; // Volatile configuration register
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m_nvconfig = 0x0fff; // Nonvolatile configuration register
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m_nvconfig = 0x0fff; // Nonvolatile configuration register
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m_quad_mode = false;
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m_quad_mode = false;
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m_mode_byte = 0;
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m_mode_byte = 0;
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m_flagreg = 0x0a5;
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m_flagreg = 0x0a5;
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|
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| Line 429... |
Line 429... |
if (m_debug) printf("EQSPI: READING FLAGSTATUS REGISTER: %02x\n", m_flagreg);
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if (m_debug) printf("EQSPI: READING FLAGSTATUS REGISTER: %02x\n", m_flagreg);
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QOREG(m_flagreg);
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QOREG(m_flagreg);
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break;
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break;
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case 0x81: // Write volatile config register
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case 0x81: // Write volatile config register
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m_state = EQSPIF_WRCR;
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m_state = EQSPIF_WRCR;
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if (m_debug) printf("EQSPI: WRITING CONFIG REGISTER: %02x\n", m_config);
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if (m_debug) printf("EQSPI: WRITING VOLATILE CONFIG REGISTER: %02x\n", m_vconfig);
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break;
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break;
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case 0x85: // Read volatile config register
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case 0x85: // Read volatile config register
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m_state = EQSPIF_RDCR;
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m_state = EQSPIF_RDCR;
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if (m_debug) printf("EQSPI: READING CONFIG REGISTER: %02x\n", m_config);
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if (m_debug) printf("EQSPI: READING VOLATILE CONFIG REGISTER: %02x\n", m_vconfig);
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QOREG(m_config>>8);
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QOREG(m_vconfig);
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break;
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break;
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case 0x9e: // Read ID (fall through)
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case 0x9e: // Read ID (fall through)
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case 0x9f: // Read ID
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case 0x9f: // Read ID
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m_state = EQSPIF_RDID; m_addr = 0;
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m_state = EQSPIF_RDID; m_addr = 0;
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if (m_debug) printf("EQSPI: READING ID\n");
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if (m_debug) printf("EQSPI: READING ID\n");
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| Line 506... |
Line 506... |
exit(-2);
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exit(-2);
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m_state = EQSPIF_IDLE;
|
m_state = EQSPIF_IDLE;
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}
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}
|
break;
|
break;
|
case EQSPIF_WRCR: // Write volatile config register, 0x81
|
case EQSPIF_WRCR: // Write volatile config register, 0x81
|
if (m_count == 8) {
|
if (m_count == 8+8) {
|
m_config = m_ireg & 0x0ff;
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m_vconfig = m_ireg & 0x0ff;
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printf("Setting volatile config register to %08x\n", m_config);
|
printf("Setting volatile config register to %08x\n", m_vconfig);
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assert((m_config & 0xfb)==0x8b);
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assert((m_vconfig & 0xfb)==0x8b);
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} break;
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} break;
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case EQSPIF_WRNVCONFIG: // Write nonvolatile config register
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case EQSPIF_WRNVCONFIG: // Write nonvolatile config register
|
if (m_count == 8) {
|
if (m_count == 8+8) {
|
m_nvconfig = m_ireg & 0x0ffdf;
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m_nvconfig = m_ireg & 0x0ffdf;
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printf("Setting nonvolatile config register to %08x\n", m_config);
|
printf("Setting nonvolatile config register to %08x\n", m_nvconfig);
|
assert((m_nvconfig & 0xffc5)==0x8fc5);
|
assert((m_nvconfig & 0xffc5)==0x8fc5);
|
} break;
|
} break;
|
case EQSPIF_WREVCONFIG: // Write enhanced volatile config reg
|
case EQSPIF_WREVCONFIG: // Write enhanced volatile config reg
|
if (m_count == 8) {
|
if (m_count == 8+8) {
|
m_evconfig = m_ireg & 0x0ff;
|
m_evconfig = m_ireg & 0x0ff;
|
printf("Setting enhanced volatile config register to %08x\n", m_evconfig);
|
printf("Setting enhanced volatile config register to %08x\n", m_evconfig);
|
assert((m_evconfig & 0x0d7)==0xd7);
|
assert((m_evconfig & 0x0d7)==0xd7);
|
} break;
|
} break;
|
case EQSPIF_WRLOCK:
|
case EQSPIF_WRLOCK:
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| Line 590... |
Line 590... |
// printf("Read SREG = %02x, wait = %08x\n", m_sreg,
|
// printf("Read SREG = %02x, wait = %08x\n", m_sreg,
|
// m_write_count);
|
// m_write_count);
|
QOREG(m_sreg);
|
QOREG(m_sreg);
|
break;
|
break;
|
case EQSPIF_RDCR:
|
case EQSPIF_RDCR:
|
if (m_debug) printf("Read CREG = %02x\n", m_creg);
|
if (m_debug) printf("Read VCONF = %02x\n", m_vconfig);
|
QOREG(m_creg);
|
QOREG(m_creg);
|
break;
|
break;
|
case EQSPIF_FAST_READ:
|
case EQSPIF_FAST_READ:
|
if (m_count < 32) {
|
if (m_count < 32) {
|
if (m_debug) printf("FAST READ, WAITING FOR FULL COMMAND (count = %d)\n", m_count);
|
if (m_debug) printf("FAST READ, WAITING FOR FULL COMMAND (count = %d)\n", m_count);
|
| Line 635... |
Line 635... |
} else if ((m_count > 32+8)&&(0 == (m_sreg&0x01))) {
|
} else if ((m_count > 32+8)&&(0 == (m_sreg&0x01))) {
|
QOREG(m_mem[m_addr++]);
|
QOREG(m_mem[m_addr++]);
|
// printf("EQSPIF[%08x]/QR = %02x\n",
|
// printf("EQSPIF[%08x]/QR = %02x\n",
|
// m_addr-1, m_oreg);
|
// m_addr-1, m_oreg);
|
} else {
|
} else {
|
printf("ERR: EQSPIF--TRYING TO READ WHILE BUSY! (count = %d)\n", m_count);
|
// printf("ERR: EQSPIF--TRYING TO READ WHILE BUSY! (count = %d)\n", m_count);
|
m_oreg = 0;
|
m_oreg = 0;
|
}
|
}
|
break;
|
break;
|
case EQSPIF_QUAD_READ:
|
case EQSPIF_QUAD_READ:
|
if (m_count == 24+8*4) {// Requires 8 QUAD clocks
|
if (m_count == 24+8*4) {// Requires 8 QUAD clocks
|
