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Subversion Repositories riscv_vhdl

[/] [riscv_vhdl/] [trunk/] [debugger/] [src/] [libdbg64g/] [services/] [mem/] [memsim.cpp] - Diff between revs 2 and 4

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Rev 2 Rev 4
Line 17... Line 17...
 
 
MemorySim::MemorySim(const char *name)  : IService(name) {
MemorySim::MemorySim(const char *name)  : IService(name) {
    registerInterface(static_cast<IMemoryOperation *>(this));
    registerInterface(static_cast<IMemoryOperation *>(this));
    registerAttribute("InitFile", &initFile_);
    registerAttribute("InitFile", &initFile_);
    registerAttribute("ReadOnly", &readOnly_);
    registerAttribute("ReadOnly", &readOnly_);
    registerAttribute("BaseAddress", &baseAddress_);
    registerAttribute("BinaryFile", &binaryFile_);
    registerAttribute("Length", &length_);
 
 
 
    initFile_.make_string("");
    initFile_.make_string("");
    readOnly_.make_boolean(false);
    readOnly_.make_boolean(false);
    baseAddress_.make_uint64(0);
    binaryFile_.make_boolean(false);
    length_.make_uint64(0);
 
    mem_ = NULL;
    mem_ = NULL;
}
}
 
 
MemorySim::~MemorySim() {
MemorySim::~MemorySim() {
    if (mem_) {
    if (mem_) {
Line 64... Line 62...
        }
        }
        RISCV_error("Can't open '%s' file", initFile_.to_string());
        RISCV_error("Can't open '%s' file", initFile_.to_string());
        return;
        return;
    }
    }
 
 
 
    if (binaryFile_.to_bool()) {
 
        fseek(fp, 0, SEEK_END);
 
        uint64_t fsz = ftell(fp);
 
        if (fsz > length_.to_uint64()) {
 
            fsz = length_.to_uint64();
 
        }
 
        fseek(fp, 0, SEEK_SET);
 
        fread(mem_, 1, static_cast<size_t>(fsz), fp);
 
    } else {
    bool bhalf = false;
    bool bhalf = false;
    int rd_symb;
    int rd_symb;
    uint8_t symb;
    uint8_t symb;
    int linecnt = 0;
    int linecnt = 0;
    int symbinline = SYMB_IN_LINE - 1;
    int symbinline = SYMB_IN_LINE - 1;
Line 96... Line 103...
        if (--symbinline < 0) {
        if (--symbinline < 0) {
            linecnt++;
            linecnt++;
            symbinline = SYMB_IN_LINE - 1;
            symbinline = SYMB_IN_LINE - 1;
        }
        }
    }
    }
 
    }
    fclose(fp);
    fclose(fp);
}
}
 
 
void MemorySim::b_transport(Axi4TransactionType *trans) {
ETransStatus MemorySim::b_transport(Axi4TransactionType *trans) {
    uint64_t mask = (length_.to_uint64() - 1);
    uint64_t off = (trans->addr - getBaseAddress()) % length_.to_int();
    uint64_t off = (trans->addr - getBaseAddress()) & mask;
 
    trans->response = MemResp_Valid;
    trans->response = MemResp_Valid;
    if (trans->action == MemAction_Write) {
    if (trans->action == MemAction_Write) {
        if (readOnly_.to_bool()) {
        if (readOnly_.to_bool()) {
            RISCV_error("Write to READ ONLY memory", NULL);
            RISCV_error("Write to READ ONLY memory", NULL);
            trans->response = MemResp_Error;
            trans->response = MemResp_Error;
Line 125... Line 132...
    uint32_t *pdata[2] = {trans->rpayload.b32, trans->wpayload.b32};
    uint32_t *pdata[2] = {trans->rpayload.b32, trans->wpayload.b32};
    RISCV_debug("[%08" RV_PRI64 "x] %s [%08x %08x]",
    RISCV_debug("[%08" RV_PRI64 "x] %s [%08x %08x]",
        trans->addr,
        trans->addr,
        rw_str[trans->action],
        rw_str[trans->action],
        pdata[trans->action][1], pdata[trans->action][0]);
        pdata[trans->action][1], pdata[trans->action][0]);
 
    return TRANS_OK;
}
}
 
 
bool MemorySim::chishex(int s) {
bool MemorySim::chishex(int s) {
    bool ret = false;
    bool ret = false;
    if (s >= '0' && s <= '9') {
    if (s >= '0' && s <= '9') {

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